Tae-Hyeon Kim

Orcid: 0000-0003-0964-7583

Affiliations:
  • Seoul National University of Science and Technology, Seoul, South Korea


According to our database1, Tae-Hyeon Kim authored at least 11 papers between 2020 and 2026.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

Online presence:

On csauthors.net:

Bibliography

2026
Exploiting Hardware Nonidealities for Robust Low-Precision Ensembles on ACIM.
IEEE Trans. Very Large Scale Integr. Syst., June, 2026

2025
Capacitive Synaptor with Gate Surrounding Semiconductor Pillar Structure and Overturned Charge Injection for Compute-in-Memory.
Adv. Intell. Syst., February, 2025

2024
Semiconductor Memory Technologies: State-of-the-Art and Future Trends.
Computer, April, 2024

Threshold learning algorithm for memristive neural network with binary switching behavior.
Neural Networks, 2024

Engineering nvCap From FEOL to BEOL with Ferroelectric Small-signal Non-destructive Read.
Proceedings of the IEEE International Memory Workshop, 2024

2023
Optimization of Random Telegraph Noise Characteristics in Memristor for True Random Number Generator.
Adv. Intell. Syst., May, 2023

Memristor Crossbar Circuit for Ternary Content-Addressable Memory with Fine-Tuning Operation.
Adv. Intell. Syst., March, 2023

2022
4-bit Multilevel Operation in Overshoot Suppressed Al2O3/TiOx Resistive Random-Access Memory Crossbar Array.
Adv. Intell. Syst., 2022

2021
Selected Bit-Line Current PUF: Implementation of Hardware Security Primitive Based on a Memristor Crossbar Array.
IEEE Access, 2021

2020
Zinc Tin Oxide Synaptic Device for Neuromorphic Engineering.
IEEE Access, 2020

Insertion of Ag Layer in TiN/SiN<sub>x</sub>/TiN RRAM and Its Effect on Filament Formation Modeled by Monte Carlo Simulation.
IEEE Access, 2020


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