Minji Shon
Orcid: 0009-0001-5498-037X
According to our database1,
Minji Shon authored at least 11 papers
between 2019 and 2026.
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Bibliography
2026
Optimization and Benchmarking of Monolithically Stackable Gain Cell Memory for Last-Level Cache.
IEEE Trans. Computers, March, 2026
Physics-informed AI Accelerated Retention Analysis of Ferroelectric Vertical NAND: From Day-Scale TCAD to Second-Scale Surrogate Model.
CoRR, March, 2026
IEEE Des. Test, February, 2026
Enabling Context-Switchable Monolithic 3D FPGA Design Using Bistable Ferroelectric Inverters.
Proceedings of the 34th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2026
2025
3-D Digital Compute-in-Memory Benchmark With A5 CFET Technology: An Extension to Lookup-Table-Based Design.
IEEE Trans. Very Large Scale Integr. Syst., July, 2025
Optimization and Benchmarking of Monolithically Stackable Gain Cell Memory for Last-Level Cache.
CoRR, March, 2025
Capacitive Synaptor with Gate Surrounding Semiconductor Pillar Structure and Overturned Charge Injection for Compute-in-Memory.
Adv. Intell. Syst., February, 2025
Modeling Dynamic Interplay Between Charge Traps and Polarization for Memory Window Enhancement in Gate Injection Layers.
Proceedings of the IEEE International Reliability Physics Symposium, 2025
2024
Optimization of Backside of Silicon-Compatible High Voltage Superlattice Capacitor for 12V-to-6V On-Chip Voltage Conversion.
Proceedings of the Device Research Conference, 2024
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2024
2019
Proceedings of the IEEE International Reliability Physics Symposium, 2019