Taekyun Shin
According to our database1,
Taekyun Shin authored at least 2 papers
between 2024 and 2026.
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Bibliography
2026
A 1cnm 14.4Gb/s/pin 16Gb LPDDR6 SDRAM with Efficiency Mode, LDO-Based WCK Tree, Dynamic Write NT-ODT, Fast CS Control and System Meta Mode.
Proceedings of the IEEE International Solid-State Circuits Conference, 2026
2024
13.8 A 1a-nm 1.05V 10.5Gb/s/pin 16Gb LPDDR5 Turbo DRAM with WCK Correction Strategy, a Voltage-Offset-Calibrated Receiver and Parasitic Capacitance Reduction.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024