Hyungrok Do

Orcid: 0000-0001-5317-6809

According to our database1, Hyungrok Do authored at least 21 papers between 2018 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Proximity-based density description with regularized reconstruction algorithm for anomaly detection.
Inf. Sci., January, 2024

2023
When More is Less: Incorporating Additional Datasets Can Hurt Performance By Introducing Spurious Correlations.
Proceedings of the Machine Learning for Healthcare Conference, 2023

Domain Generalization via Heckman-type Selection Models.
Proceedings of the Eleventh International Conference on Learning Representations, 2023

2022
Deep learning-based fast time-resolved flame emission spectroscopy in high-pressure combustion environment.
CoRR, 2022

Fair Generalized Linear Models with a Convex Penalty.
Proceedings of the International Conference on Machine Learning, 2022

2021
Hierarchical segment-channel attention network for explainable multichannel signal classification.
Inf. Sci., 2021

A 10 Gb/s PAM-4 Transmitter With Feed-Forward Implementation of Tomlinson-Harashima Precoding in 28 nm CMOS.
IEEE Access, 2021

Dynamic Survival Analysis for EHR Data with Personalized Parametric Distributions.
Proceedings of the Machine Learning for Healthcare Conference, 2021

A 64 Gb/s 2.09 pJ/b PAM-4 VCSEL Transmitter with Bandwidth Extension Techniques in 40 nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021

2020
A 48 Gb/s PAM-4 Transmitter With 3-Tap FFE Based on Double-Shielded Coplanar Waveguide in 65-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2020

Outer-Points shaver: Robust graph-based clustering via node cutting.
Pattern Recognit., 2020

A Capacitor-Coupled Offset-Canceled Sense Amplifier for DRAMs With Reduced Variation of Decision Threshold Voltage.
IEEE J. Solid State Circuits, 2020

Graph Structured Sparse Subset Selection.
Inf. Sci., 2020

A 112-Gb/s PAM-4 Transmitter with 8: 1 MUX in 28-nm CMOS.
Proceedings of the International SoC Design Conference, 2020

Early Diagnosis and Prediction of Wafer Quality Using Machine Learning on sub-10nm Logic Technology.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

2019
Visualization of streamline tracing inlet-isolator flows using a planar laser Rayleigh scattering imaging technique.
J. Vis., 2019

A 64Gb/s 2.29pJ/b PAM-4 VCSEL Transmitter With 3-Tap Asymmetric FFE in 65nm CMOS.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

56Gb/s PAM-4 VCSEL Transmitter with Quarter-Rate Forwarded Clock using 65nm CMOS Circuits.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2019

2018
25-Gb/s Clocked Pluggable Optics for High-Density Data Center Interconnections.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

Clear the Fog: Combat Value Assessment in Incomplete Information Games with Convolutional Encoder-Decoders.
CoRR, 2018

4-Channel Push-Pull VCSEL Drivers for HDMI Active Optical Cable in 0.18-μm CMOS.
Proceedings of the International Symposium on Low Power Electronics and Design, 2018


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