Heewoong Song
According to our database1,
Heewoong Song authored at least 3 papers
between 2024 and 2026.
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Bibliography
2026
An 18.4-Gb/s/pin Simultaneous Bidirectional Transceiver for Post HBM4 Using Four-Phase Hybrid Timing Alignment and Dual Equalization.
IEEE Solid State Circuits Lett., 2026
A 1cnm 14.4Gb/s/pin 16Gb LPDDR6 SDRAM with Efficiency Mode, LDO-Based WCK Tree, Dynamic Write NT-ODT, Fast CS Control and System Meta Mode.
Proceedings of the IEEE International Solid-State Circuits Conference, 2026
2024
13.4 A 48GB 16-High 1280GB/s HBM3E DRAM with All-Around Power TSV and a 6-Phase RDQS Scheme for TSV Area Optimization.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024