Tao He

Affiliations:
  • Oregon State University, School of Electrical Engineering and Computer Science, Corvallis, OR, USA


According to our database1, Tao He authored at least 22 papers between 2014 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Online presence:

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Bibliography

2020
Digital Correction of DAC Nonlinearity in Multi-Bit Feedback A/D Converters: Invited tutorial.
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020

2019
Noise Filtering and Linearization of Single-Ended Sampled-Data Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

2018
Robust Continuous-Time MASH Delta Sigma Modulator.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

A 50MHZ-BW continuous-time ΔΣ ADC with dynamic error correction achieving 79.8dB SNDR and 95.2dB SFDR.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

System-level noise filtering and linearization.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018

2017
A 16 b Multi-Step Incremental Analog-to-Digital Converter With Single-Opamp Multi-Slope Extended Counting.
IEEE J. Solid State Circuits, 2017

Pseudo-pseudo-differential circuits.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

Incremental ADC with parallel counting.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

A two-capacitor SAR-assisted multi-step incremental ADC with a single amplifier achieving 96.6 dB SNDR over 1.2 kHz BW.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

2016
A 35µW 96.8dB SNDR 1 kHz BW multi-step incremental ADC using multi-slope extended counting with a single integrator.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

An incremental analog-to-digital converter with multi-step extended counting for sensor interfaces.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015
A Continuous-Time Delta-Sigma Modulator for Biomedical Ultrasound Beamformer Using Digital ELD Compensation and FIR Feedback.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

Low-Distortion Wideband Delta-Sigma ADCs With Shifted Loop Delays.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

A Micro-Power Two-Step Incremental Analog-to-Digital Converter.
IEEE J. Solid State Circuits, 2015

Incremental Analog-to-Digital Converters for High-Resolution Energy-Efficient Sensor Interfaces.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2015

A noise-coupled time-interleaved delta-sigma modulator with shifted loop delays.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A 16-bit 1KHz bandwidth micro-power multi-step incremental ADC for multi-channel sensor interface.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A 19.2-mW, 81.6-dB SNDR, 4-MHz bandwidth delta-sigma modulator with shifted loop delays.
Proceedings of the ESSCIRC Conference 2015, 2015

2014
A noise-coupled low-distortion delta-sigma ADC with shifted loop delays.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

A continuous-time ΔΣ modulator with a digital technique for excess loop delay compensation.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A 11μW 250 Hz BW two-step incremental ADC with 100 dB DR and 91 dB SNDR for integrated sensor interfaces.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

A 1 V 59 fJ/Step 15 MHz BW 74 dB SNDR continuous-time ΔΣ modulator with digital ELD compensation and multi-bit FIR feedback.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014


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