Robinson E. Pino

According to our database1, Robinson E. Pino authored at least 30 papers between 2010 and 2014.

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Bibliography

2014
Memristors and the Future of Cyber Security Hardware.
Proceedings of the Network Science and Cybersecurity, 2014

Reconfigurable Memristor Based Computing Logic.
Proceedings of the Cybersecurity Systems for Human Cognition Augmentation, 2014

Memristor SPICE Model Simulation and Device Hardware Correlation.
Proceedings of the Cybersecurity Systems for Human Cognition Augmentation, 2014

Neuromorphic Computing for Cognitive Augmentation in Cyber Defense.
Proceedings of the Cybersecurity Systems for Human Cognition Augmentation, 2014

Design of Neuromorphic Architectures with Memristors.
Proceedings of the Network Science and Cybersecurity, 2014

Alert Data Aggregation and Transmission Prioritization over Mobile Networks.
Proceedings of the Network Science and Cybersecurity, 2014

2013
Generalized Memristive Device SPICE Model and its Application in Circuit Design.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2013

Memristor-Based Neural Logic Blocks for Nonlinearly Separable Functions.
IEEE Trans. Computers, 2013

A Parallel Neuromorphic Text Recognition System and Its Implementation on a Heterogeneous High-Performance Computing Cluster.
IEEE Trans. Computers, 2013

Memristor SPICE model and crossbar simulation based on devices with nanosecond switching time.
Proceedings of the 2013 International Joint Conference on Neural Networks, 2013

2012
Leveraging Memristive Systems in the Construction of Digital Logic Circuits.
Proceedings of the IEEE, 2012

Memristor-based synapse design and training scheme for neuromorphic computing architecture.
Proceedings of the 2012 International Joint Conference on Neural Networks (IJCNN), 2012

Spintronic memristor based temperature sensor design with CMOS current reference.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Statistical memristor modeling and case study in neuromorphic computing.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

Cloud/big data computing for defense.
Proceedings of the 3rd International Conference on Computing for Geospatial Research and Application, 2012

Computational intelligence and neuromorphic computing potential for geospatial research and applications.
Proceedings of the 3rd International Conference on Computing for Geospatial Research and Application, 2012

2011
3D-HIM: A 3D High-density Interleaved Memory for bipolar RRAM design.
Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures, 2011

Exploiting memristance for low-energy neuromorphic computing hardware.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Analysis of a memristor based 1T1M crossbar architecture.
Proceedings of the 2011 International Joint Conference on Neural Networks, 2011

A low-power memristive neuromorphic circuit utilizing a global/local training mechanism.
Proceedings of the 2011 International Joint Conference on Neural Networks, 2011

A columnar V1/V2 visual cortex model and emulation using a PS3 cell-BE array.
Proceedings of the 2011 International Joint Conference on Neural Networks, 2011

Fast statistical model of TiO2 thin-film memristor and design implication.
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

3D-ICML: A 3D bipolar ReRAM design with interleaved complementary memory layers.
Proceedings of the Design, Automation and Test in Europe, 2011

Confabulation based sentence completion for machine reading.
Proceedings of the 2011 IEEE Symposium on Computational Intelligence, 2011

Geometry variations analysis of TiO2 thin-film and spintronic memristors.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010
Compact method for modeling and simulation of memristor devices: Ion conductor chalcogenide-based memristor devices.
Proceedings of the 2010 IEEE/ACM International Symposium on Nanoscale Architectures, 2010

A columnar primary visual cortex (V1) model emulation using a PS3 Cell-BE array.
Proceedings of the International Joint Conference on Neural Networks, 2010

Analysis of dynamic linear and non-linear memristor device models for emerging neuromorphic computing hardware design.
Proceedings of the International Joint Conference on Neural Networks, 2010

Affordable emerging computer hardware for neuromorphic computing applications.
Proceedings of the International Joint Conference on Neural Networks, 2010

Emerging neuromorphic computing architectures & enabling hardware for cognitive information processing applications.
Proceedings of the 2nd International Workshop on Cognitive Information Processing, 2010


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