Sek M. Chai

According to our database1, Sek M. Chai authored at least 45 papers between 1993 and 2022.

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Bibliography

2022
Dynamically throttleable neural networks.
Mach. Vis. Appl., 2022

2020
Dynamically Throttleable Neural Networks (TNN).
CoRR, 2020

2019
Generative Memory for Lifelong Reinforcement Learning.
CoRR, 2019

Power-Grid Controller Anomaly Detection with Enhanced Temporal Deep Learning.
Proceedings of the 18th IEEE International Conference On Trust, 2019

Bootstrapping Deep Neural Networks from Approximate Image Processing Pipelines.
Proceedings of the 2nd Workshop on Energy Efficient Machine Learning and Cognitive Computing for Embedded Applications, 2019

2018
Guest Editorial: Special Issue on Embedded Computer Vision.
J. Signal Process. Syst., 2018

Efficient Object Detection Using Embedded Binarized Neural Networks.
J. Signal Process. Syst., 2018

Deep Multimodal Fusion: A Hybrid Approach.
Int. J. Comput. Vis., 2018

Bootstrapping Deep Neural Networks from Image Processing and Computer Vision Pipelines.
CoRR, 2018

Generalized Ternary Connect: End-to-End Learning and Compression of Multiplication-Free Deep Neural Networks.
CoRR, 2018

Detecting Zero-day Controller Hijacking Attacks on the Power-Grid with Enhanced Deep Learning.
CoRR, 2018

2017
BitNet: Bit-Regularized Deep Neural Networks.
CoRR, 2017

GPU Activity Prediction using Representation Learning.
CoRR, 2017

Low Precision Neural Networks using Subband Decomposition.
CoRR, 2017

2016
Hardware Performance Counter-Based Malware Identification and Detection with Adaptive Compressive Sensing.
ACM Trans. Archit. Code Optim., 2016

Unsupervised underwater fish detection fusing flow and objectiveness.
Proceedings of the 2016 IEEE Winter Applications of Computer Vision Workshops, 2016

Neurocube: A Programmable Digital Neuromorphic Architecture with High-Density 3D Memory.
Proceedings of the 43rd ACM/IEEE Annual International Symposium on Computer Architecture, 2016

2015
FPGA acceleration for feature based processing applications.
Proceedings of the 2015 IEEE Conference on Computer Vision and Pattern Recognition Workshops, 2015

2013
An Embedded Vision Services Framework for Heterogeneous Accelerators.
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2013

2012
Vision Guided Compression on low-bit rate channels.
Proceedings of the 2012 Visual Communications and Image Processing, 2012

Multi-Resolution Real-Time Dense Stereo Vision Processing in FPGA.
Proceedings of the 2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, 2012

Stereo Vision embedded system for Augmented Reality.
Proceedings of the 2012 IEEE Computer Society Conference on Computer Vision and Pattern Recognition Workshops, 2012

2011
Streaming Data Movement for Real-Time Image Analysis.
J. Signal Process. Syst., 2011

Method of image fusion and enhancement using mask pyramid.
Proceedings of the 14th International Conference on Information Fusion, 2011

2010
Special issue on embedded vision.
Comput. Vis. Image Underst., 2010

Fisheye lens distortion correction on multicore and hardware accelerator platforms.
Proceedings of the 24th IEEE International Symposium on Parallel and Distributed Processing, 2010

2009
Proteus: An architectural synthesis tool based on the stream programming paradigm.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

Real-Time Fisheye Lens Distortion Correction Using Automatically Generated Streaming Accelerators.
Proceedings of the FCCM 2009, 2009

2007
Mapping streaming architectures on reconfigurable platforms.
SIGARCH Comput. Archit. News, 2007

An Architectural Framework for Automated Streaming Kernel Selection.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

2006
Memory bandwidth optimization through stream descriptors.
SIGARCH Comput. Archit. News, 2006

FPGA implementation of a license plate recognition SoC using automatically generated streaming accelerators.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

Compiler Manipulation of Stream Descriptors for Data Access Optimization.
Proceedings of the 2006 International Conference on Parallel Processing Workshops (ICPP Workshops 2006), 2006

Template-Based Generation of Streaming Accelators from a High Level Presentation.
Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006

Reconfigurable Streaming Architectures for Embedded Smart Cameras.
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2006

2005
Streaming processors for next-generation mobile imaging applications.
IEEE Commun. Mag., 2005

Streaming I/O for Imaging Applications.
Proceedings of the Seventh International Workshop on Computer Architectures for Machine Perception (CAMP 2005), 2005

2002
Systolic Opportunities for Multidimensional Data Streams.
IEEE Trans. Parallel Distributed Syst., 2002

2000
Bidirectional single fiber low-cost optoelectronic interconnect for automotive applications.
IEEE Trans. Veh. Technol., 2000

Heterogeneous architecture models for interconnect-motivated system design.
IEEE Trans. Very Large Scale Integr. Syst., 2000

1999
Impact of Power Density Limitation in Gigascale Integration for the SIMD Pixel Processor.
Proceedings of the 18th Conference on Advanced Research in VLSI (ARVLSI '99), 1999

1997
Power/Performance Trade-offs for Direct Networks.
Proceedings of the Parallel Computer Routing and Communication, 1997

HiPER-P: An Efficient, High-Performance Router for Multicomputer Interconnection Networks.
Proceedings of the Parallel Computer Routing and Communication, 1997

Power Constrained Design of Multiprocessor Interconnection Networks.
Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997

1993
Pica: An Ultra-Light Processor for High-Througput Applications.
Proceedings of the Proceedings 1993 International Conference on Computer Design: VLSI in Computers & Processors, 1993


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