Tetsuro Tamura

According to our database, Tetsuro Tamura authored at least 5 papers between 2003 and 2014.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2014

A 1.95 GHz Fully Integrated Envelope Elimination and Restoration CMOS Power Amplifier Using Timing Alignment Technique for WCDMA and LTE.

Kazuaki Oishi, Eiji Yoshida, Yasufumi Sakai, Hideki Takauchi, Yoichi Kawano, Noriaki Shirai, Hideki Kano, Masahiro Kudo, Tomotoshi Murakami, Tetsuro Tamura, Shigeaki Kawai, Kazuo Suto, Hiroshi Yamazaki, Toshihiko Mori

IEEE J. Solid State Circuits, 2014

3.2 A 1.95GHz fully integrated envelope elimination and restoration CMOS power amplifier with envelope/phase generator and timing aligner for WCDMA and LTE.

Kazuaki Oishi, Eiji Yoshida, Yasufumi Sakai, Hideki Takauchi, Yoichi Kawano, Noriaki Shirai, Hideki Kano, Masahiro Kudo, Tomotoshi Murakami, Tetsuro Tamura, Seitaro Kawai, Shinji Yamaura, Kazuo Suto, Hiroshi Yamazaki, Toshihiko Mori

Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2012

A fully integrated triple-band CMOS power amplifier for WCDMA mobile handsets.

Kouichi Kanda, Yoichi Kawano, Takao Sasaki, Noriaki Shirai, Tetsuro Tamura, Shigeaki Kawai, Masahiro Kudo, Tomotoshi Murakami, Hiroyuki Nakamoto, Nobumasa Hasegawa, Hideki Kano, Nobuhiro Shimazui, Akiko Mineyama, Kazuaki Oishi, Masashi Shima, Naoyoshi Tamura, Toshihide Suzuki, Toshihiko Mori, Kimitoshi Niratsuka, Shinji Yamaura

Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2010

A proposal on RFID data analytics methods.

Tetsuro Tamura, Tatsuya Inaba, Osamu Nakamura, Jiro Kokuryo, Jun Murai

Proceedings of the 2010 Internet of Things (IOT), IoT for a green Planet, Tokyo, Japan, November 29, 2010

2003

Presentation of visualization.

Tetsuro Tamura, Masaaki Kawahashi

J. Vis., 2003