Tom Kolan

According to our database1, Tom Kolan authored at least 4 papers between 2014 and 2020.

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Bibliography

2020
Post-Silicon Validation of the IBM POWER9 Processor.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2016
Unveiling difficult bugs in address translation caching arrays for effective post-silicon validation.
Proceedings of the 34th IEEE International Conference on Computer Design, 2016

Probabilistic bug-masking analysis for post-silicon tests in microprocessor verification.
Proceedings of the 53rd Annual Design Automation Conference, 2016

2014
Burst List Decoding of Interleaved Reed-Solomon Codes.
IEEE Trans. Inf. Theory, 2014


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