Tracy Larrabee

According to our database, Tracy Larrabee authored at least 31 papers between 1984 and 2020.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2020

Successful Interventions to Eliminate Achievement Gaps in STEM Courses.

Tracy Larrabee, Narges Norouzi, Carmen Robinson, Jenny Quynn

Proceedings of the Research on Equity and Sustained Participation in Engineering, 2020

2002

Multiplets, Models, and the Search for Meaning: Improving Per-Test Fault Diagnosis.

David B. Lavo, Ismed Hartanto, Tracy Larrabee

Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

2001

Yield Optimization and Its Relation to Test.

Tracy Larrabee, Jon Colbum

Proceedings of the 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April, 2001

Making cause-effect cost effective: low-resolution fault dictionaries.

David B. Lavo, Tracy Larrabee

Proceedings of the Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October, 2001

2000

A Scalable, Loadable Custom Programmable Logic Device for Solving Boolean Satisfiability Problems.

Mark J. Boyd, Tracy Larrabee

Proceedings of the 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 2000

1999

Creating small fault dictionaries [logic circuit fault diagnosis].

Brian Chess, Tracy Larrabee

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

Eliminating the Ouija board: automatic thresholds and probabilistic I_DDQ diagnosis.

David B. Lavo, Tracy Larrabee, Jonathon E. Colburn

Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

1998

Diagnosing realistic bridging faults with single stuck-at information.

David B. Lavo, Brian Chess, Tracy Larrabee, F. Joel Ferguson

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998

Logic Testing of Bridging Faults in CMOS Integrated Circuits.

Brian Chess, Tracy Larrabee

IEEE Trans. Computers, 1998

A Study on the Utility of Using Expected Quality Level as a Design for Testability Metric.

Douglas Williams, F. Joel Ferguson, Tracy Larrabee

Proceedings of the 16th IEEE VLSI Test Symposium (VTS '98), 28 April, 1998

On applying non-classical defect models to automated diagnosis.

Jayashree Saxena, Kenneth M. Butler, Hari Balachandran, David B. Lavo, Tracy Larrabee, F. Joel Ferguson, Brian Chess

Proceedings of the Proceedings IEEE International Test Conference 1998, 1998

Probabilistic mixed-model fault diagnosis.

David B. Lavo, Brian Chess, Tracy Larrabee, Ismed Hartanto

Proceedings of the Proceedings IEEE International Test Conference 1998, 1998

1997

Bridging Fault Diagnosis in the Absence of Physical Information.

David B. Lavo, Tracy Larrabee, F. Joel Ferguson, Brian Chess, Jayashree Saxena, Kenneth M. Butler

Proceedings of the Proceedings IEEE International Test Conference 1997, 1997

1996

Charge-based fault simulation for CMOS network breaks.

Haluk Konuk, F. Joel Ferguson, Tracy Larrabee

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996

Beyond the Byzantine Generals: Unexpected Behaviour and Bridging Fault Diagnosis.

David B. Lavo, Tracy Larrabee, Brian Chess

Proceedings of the Proceedings IEEE International Test Conference 1996, 1996

1995

Diagnosis of realistic bridging faults with single stuck-at information.

Brian Chess, David B. Lavo, F. Joel Ferguson, Tracy Larrabee

Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995

Accurate and Efficient Fault Simulation of Realistic CMOS Network Breaks.

Haluk Konuk, F. Joel Ferguson, Tracy Larrabee

Proceedings of the 32st Conference on Design Automation, 1995

1994

On evaluating competing bridge fault models for CMOS ICs.

Brian Chess, Carl Roth, Tracy Larrabee

Proceedings of the 12th IEEE VLSI Test Symposium (VTS'94), 1994

Testing CMOS Logic Gates for Realistic Shorts.

Brian Chess, Anthony Freitas, F. Joel Ferguson, Tracy Larrabee

Proceedings of the Proceedings IEEE International Test Conference 1994, 1994

Generating Test Patterns for Bridge Faults in CMOS ICs.

Brian Chess, Tracy Larrabee

Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994

1993

Explorations of sequential ATPG using Boolean satisfiability.

Haluk Konuk, Tracy Larrabee

Proceedings of the 11th IEEE VLSI Test Symposium (VTS'93), 1993

Bridge Fault simulation strategies for CMOS integrated Circuits.

Brian Chess, Tracy Larrabee

Proceedings of the 30th Design Automation Conference. Dallas, 1993

1992

Test pattern generation using Boolean satisfiability.

Tracy Larrabee

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992

1991

Test pattern generation for current testable faults in static CMOS circuits.

F. Joel Ferguson, Tracy Larrabee

Proceedings of the 9th IEEE VLSI Test Symposium (VTS'91), 1991

Test Pattern Generation for Realistic Bridge Faults in CMOS ICs.

F. Joel Ferguson, Tracy Larrabee

Proceedings of the Proceedings IEEE International Test Conference 1991, 1991

1990

Efficient generation of test patterns using Boolean satisfiability.

Tracy Larrabee

PhD thesis, 1990

Testing for parametric faults in static CMOS circuits.

F. Joel Ferguson, Martin Taylor, Tracy Larrabee

Proceedings of the Proceedings IEEE International Test Conference 1990, 1990

1989

Efficient Generation of Test Patterns Using Boolean Difference.

Tracy Larrabee

Proceedings of the Proceedings International Test Conference 1989, 1989

A framework for evaluating test pattern generation strategies.

Tracy Larrabee

Proceedings of the Computer Design: VLSI in Computers and Processors, 1989

Mathematical Writing.

Donald E. Knuth, Tracy Larrabee, Paul M. Roberts

MAA notes 14, Mathematical Association of America, ISBN: 978-0-88385-063-3, 1989

1984

Gambit: A Prototyping Approach to Video Game Design.

Tracy Larrabee, Chad L. Mitchell

IEEE Softw., 1984