Haluk Konuk

According to our database, Haluk Konuk authored at least 17 papers between 1990 and 2015.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2015

Design for low test pattern counts.

Haluk Konuk, Elham K. Moghaddam, Nilanjan Mukherjee, Janusz Rajski, Deepak Solanki, Jerzy Tyszer, Justyna Zawada

Proceedings of the 52nd Annual Design Automation Conference, 2015

2013

Innovative practices session 6C: Latest practices in test compression.

Jonathon E. Colburn, K.-Y. Chung, Haluk Konuk, Y. Dong

Proceedings of the 31st IEEE VLSI Test Symposium, 2013

2009

DFT and Test Problems from the Trenches.

Haluk Konuk

Proceedings of the 27th IEEE VLSI Test Symposium, 2009

Defect Detection Differences between Launch-Off-Shift and Launch-Off-Capture in Sense-Amplifier-Based Flip-Flop Testing.

Haluk Konuk

Proceedings of the 27th IEEE VLSI Test Symposium, 2009

2003

DFFT : Design For Functional Testability.

Haluk Konuk, Leon Xiao

Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

2002

Validation and Test of Network Processors and ASICs.

C.-H. Chia, Sujit Dey, Faraydon Karim, Haluk Konuk, Keesup Kim

Proceedings of the 20th IEEE VLSI Test Symposium (VTS 2002), Without Testing It's a Gamble, 28 April, 2002

2000

On invalidation mechanisms for non-robust delay tests.

Haluk Konuk

Proceedings of the Proceedings IEEE International Test Conference 2000, 2000

1999

Voltage- and current-based fault simulation for interconnect open defects.

Haluk Konuk

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

1998

Oscillation and sequential behavior caused by opens in the routing in digital CMOS circuits.

Haluk Konuk, F. Joel Ferguson

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998

1997

Oscillation and Sequential Behavior Caused by Interconnect Opens in Digital CMOS Circuits.

Haluk Konuk, F. Joel Ferguson

Proceedings of the Proceedings IEEE International Test Conference 1997, 1997

Fault simulation of interconnect opens in digital CMOS circuits.

Haluk Konuk

Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

1996

Charge-based fault simulation for CMOS network breaks.

Haluk Konuk, F. Joel Ferguson, Tracy Larrabee

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996

An unexpected factor in testing for CMOS opens: the die surface.

Haluk Konuk, F. Joel Ferguson

Proceedings of the 14th IEEE VLSI Test Symposium (VTS'96), April 28, 1996

1995

Accurate and Efficient Fault Simulation of Realistic CMOS Network Breaks.

Haluk Konuk, F. Joel Ferguson, Tracy Larrabee

Proceedings of the 32st Conference on Design Automation, 1995

1994

Fastpath: A Path-Delay Test Generator for Standard Scan Designs.

Bill Underwood, Wai-On Law, Sungho Kang, Haluk Konuk

Proceedings of the Proceedings IEEE International Test Conference 1994, 1994

1993

Explorations of sequential ATPG using Boolean satisfiability.

Haluk Konuk, Tracy Larrabee

Proceedings of the 11th IEEE VLSI Test Symposium (VTS'93), 1993

1990

A Linear Program Driven Scheduling and Allocation Method Followed by an Interconnect Optimization Algorithm.

Christos A. Papachristou, Haluk Konuk

Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, 1990