Tuan Vu Cao

Orcid: 0000-0001-5896-2091

According to our database1, Tuan Vu Cao authored at least 19 papers between 2008 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Comparative Analysis of Deep Learning and Statistical Models for Air Pollutants Prediction in Urban Areas.
IEEE Access, 2023

2022
Machine Learning-Based Digital Twin for Predictive Modeling in Wind Turbines.
IEEE Access, 2022

2013
Domino logic designs for high-performance and leakage-tolerant applications.
Integr., 2013

2012
A 9-bit 50MS/s asynchronous SAR ADC in 28nm CMOS.
Proceedings of the NORCHIP 2012, Copenhagen, Denmark, November 12-13, 2012, 2012

High resolution Frequency-based Delta-Sigma Modulator utilizing multi-phase quantizer.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

BFSK MICS direct-DCO transmitter with adaptive background frequency regulation.
Proceedings of the 38th European Solid-State Circuit conference, 2012

2011
Energy-efficient resonant BFSK MICS transmitter with fast-settling dual-loop adaptive frequency locking.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2010
New SRAM design using body bias technique for ultra low power applications.
Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010

Rail-to-rail low-power fully differential OTA utilizing adaptive biasing and partial feedback.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Data-dependant sense-amplifier flip-flop for low power applications.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

2009
Improved write margin 6T-SRAM for low supply voltage applications.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009

Low Phase-Noise and Wide Tuning-Range CMOS Differential VCO for Frequency ?S Modulator.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2009

New subthreshold concepts in 65nm CMOS technology.
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

Ultra Low Power Full Adder Topologies.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Novel Low Voltage Current-mirror Sense Amplifier based Flip-Flop with Reduced Delay Time.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Low power 4 x 5-Gb/s VCSEL driver array in 0.13-µm CMOS.
Proceedings of the 16th IEEE International Conference on Electronics, 2009

Low phase-noise VCO utilizing NMOS symmetric load for Frequency-based Delta-Sigma Modulators.
Proceedings of the 16th IEEE International Conference on Electronics, 2009

2008
65NM sub-threshold 11T-SRAM for ultra low voltage applications.
Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008

Novel start-up circuit with enhanced power-up characteristic for bandgap references.
Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008


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