Elena I. Vatajelu

CoRR, 2023

NEUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS.

[BibT_eX]

[DOI]

CoRR, 2023

Special Session: Neuromorphic hardware design and reliability from traditional CMOS to emerging technologies.

[BibT_eX]

[DOI]

Fabio Pavanello

Thomas Van Vaerenbergh

Proceedings of the 41st IEEE VLSI Test Symposium, 2023

On-Line Method to Limit Unreliability and Bit-Aliasing in RO-PUF.

[BibT_eX]

[DOI]

Proceedings of the 29th International Symposium on On-Line Testing and Robust System Design, 2023

Experimental Evaluation of Delayed-Based Detectors Against Power-off Attack.

[BibT_eX]

[DOI]

Proceedings of the 29th International Symposium on On-Line Testing and Robust System Design, 2023

A Study of High Temperature Effects on Ring Oscillator Based Physical Unclonable Functions.

[BibT_eX]

[DOI]

Proceedings of the 29th International Symposium on On-Line Testing and Robust System Design, 2023

EUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS.

[BibT_eX]

[DOI]

Proceedings of the IEEE European Test Symposium, 2023

Open Automation Framework for Complex Parametric Electrical Simulations.

[BibT_eX]

[DOI]

Pietro Inglese

Proceedings of the 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2023

2022

Guest Editorial: Computation-In-Memory (CIM): from Device to Applications.

[BibT_eX]

[DOI]

Said Hamdioui

ACM J. Emerg. Technol. Comput. Syst., 2022

On-Line Reliability Estimation of Ring Oscillator PUF.

[BibT_eX]

[DOI]

Proceedings of the IEEE European Test Symposium, 2022

Synaptic Control for Hardware Implementation of Spike Timing Dependent Plasticity.

[BibT_eX]

[DOI]

Salah Daddinounou

Proceedings of the 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2022

Dependability of Alternative Computing Paradigms for Machine Learning: hype or hope?

[BibT_eX]

[DOI]

Proceedings of the 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2022

2021

On the Limitations of Concatenating Boolean Operations in Memristive-Based Logic-In-Memory Solutions.

[BibT_eX]

[DOI]

Pietro Inglese

Proceedings of the 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2021

Identification of Hardware Devices based on Sensors and Switching Activity: a Preliminary Study.

[BibT_eX]

[DOI]

Honorio Martín

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020

Stuck-At Fault Mitigation of Emerging Technologies Based Switching Lattices.

[BibT_eX]

[DOI]

J. Electron. Test., 2020

Machine Learning and Hardware security: Challenges and Opportunities -Invited Talk-.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

2019

High-Entropy STT-MTJ-Based TRNG.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2019

Challenges and Solutions in Emerging Memory Testing.

[BibT_eX]

[DOI]

IEEE Trans. Emerg. Top. Comput., 2019

Special Session: Reliability of Hardware-Implemented Spiking Neural Networks (SNN).

[BibT_eX]

[DOI]

Proceedings of the 37th IEEE VLSI Test Symposium, 2019

Fault Mitigation of Switching Lattices under the Stuck-At-Fault Model.

[BibT_eX]

[DOI]

Proceedings of the IEEE Latin American Test Symposium, 2019

On the Reliability of the Ring Oscillator Physically Unclonable Functions.

[BibT_eX]

[DOI]

Proceedings of the 4th IEEE International Verification and Security Workshop, 2019

IEEE European Test Symposium (ETS).

[BibT_eX]

[DOI]

Mehdi Baradaran Tahoori

Proceedings of the IEEE International Test Conference, 2019

On the Encryption of the Challenge in Physically Unclonable Functions.

[BibT_eX]

[DOI]

Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019

Rebooting Computing: The Challenges for Test and Reliability.

[BibT_eX]

[DOI]

Gennaro Severino Rodrigues

Ian O'Connor

Fernanda Lima Kastensmidt

Proceedings of the 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2019

Hidden-Delay-Fault Sensor for Test, Reliability and Security.

[BibT_eX]

[DOI]

Kalpana Senthamarai Kannan

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018

State of the art and challenges for test and reliability of emerging nonvolatile resistive memories.

[BibT_eX]

[DOI]

Peyman Pouyan

Said Hamdioui

Int. J. Circuit Theory Appl., 2018

Test and Reliability in Approximate Computing.

[BibT_eX]

[DOI]

J. Electron. Test., 2018

Neuromorphic Computing - From Robust Hardware Architectures to Testing Strategies.

[BibT_eX]

[DOI]

Proceedings of the IFIP/IEEE International Conference on Very Large Scale Integration, 2018

Integrated Synthesis Methodology for Crossbar Arrays.

[BibT_eX]

[DOI]

Muhammed Ceylan Morgül

Proceedings of the 14th IEEE/ACM International Symposium on Nanoscale Architectures, 2018

Resistive and Spintronic RAMs: Device, Simulation, and Applications.

[BibT_eX]

[DOI]

Proceedings of the 24th IEEE International Symposium on On-Line Testing And Robust System Design, 2018

2017

Fully-connected single-layer STT-MTJ-based spiking neural network under process variability.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2017

Zero bit-error-rate weak PUF based on Spin-Transfer-Torque MRAM memories.

[BibT_eX]

[DOI]

Proceedings of the IEEE 2nd International Verification and Security Workshop, 2017

Reliability analysis of MTJ-based functional module for neuromorphic computing.

[BibT_eX]

[DOI]

Proceedings of the 23rd IEEE International Symposium on On-Line Testing and Robust System Design, 2017

Mitigating read & write errors in STT-MRAM memories under DVS.

[BibT_eX]

[DOI]

Michel Renovell

Proceedings of the 22nd IEEE European Test Symposium, 2017

Memristive devices: Technology, design automation and computing frontiers.

[BibT_eX]

[DOI]

Proceedings of the 12th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2017

2016

STT-MRAM-Based PUF Architecture Exploiting Magnetic Tunnel Junction Fabrication-Induced Variability.

[BibT_eX]

[DOI]

ACM J. Emerg. Technol. Comput. Syst., 2016

Security primitives (PUF and TRNG) with STT-MRAM.

[BibT_eX]

[DOI]

Proceedings of the 34th IEEE VLSI Test Symposium, 2016

STT-MTJ-based TRNG with on-the-fly temperature/current variation compensation.

[BibT_eX]

[DOI]

Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016

SEcube™: An open-source security platform in a single SoC.

[BibT_eX]

[DOI]

Proceedings of the 2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, 2016

Towards a highly reliable SRAM-based PUFs.

[BibT_eX]

[DOI]

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015

STT-MRAM-Based Strong PUF Architecture.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015

Power-aware voltage tuning for STT-MRAM reliability.

[BibT_eX]

[DOI]

Proceedings of the 20th IEEE European Test Symposium, 2015

STT-MRAM cell reliability evaluation under process, voltage and temperature (PVT) variations.

[BibT_eX]

[DOI]

Marco Indaco

Proceedings of the 10th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2015

Read/write robustness estimation metrics for spin transfer torque (STT) MRAM cell.

[BibT_eX]

[DOI]

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

STT MRAM-Based PUFs.

[BibT_eX]

[DOI]

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014

Sram cell stability metric under transient voltage noise.

[BibT_eX]

[DOI]

Microelectron. J., 2014

Nonvolatile memories: Present and future challenges.

[BibT_eX]

[DOI]

Hassen Aziza

Cristian Zambelli

Proceedings of the 9th International Design and Test Symposium, 2014

Integration of STT-MRAM model into CACTI simulator.

[BibT_eX]

[DOI]

Proceedings of the 9th International Design and Test Symposium, 2014

On the impact of process variability and aging on the reliability of emerging memories (Embedded tutorial).

[BibT_eX]

[DOI]

Marco Indaco

Proceedings of the 19th IEEE European Test Symposium, 2014

Reliability estimation at block-level granularity of spin-transfer-torque MRAMs.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2014

2013

Domino logic designs for high-performance and leakage-tolerant applications.

[BibT_eX]

[DOI]

Integr., 2013

SRAM soft error rate evaluation under atmospheric neutron radiation and PVT variations.

[BibT_eX]

[DOI]

Georgios Tsiligiannis

Serge Pravossoudovitch

Proceedings of the 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 2013

Analyzing resistive-open defects in SRAM core-cell under the effect of process variability.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE European Test Symposium, 2013

Analyzing the effect of concurrent variability in the core cells and sense amplifiers on SRAM read access failures.

[BibT_eX]

[DOI]

Proceedings of the 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2013

On the correlation between Static Noise Margin and Soft Error Rate evaluated for a 40nm SRAM cell.

[BibT_eX]

[DOI]

Georgios Tsiligiannis

Luigi Dilillo

Patrick Girard

Serge Pravossoudovitch

Proceedings of the 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2013

Adaptive Source Bias for Improved Resistive-Open Defect Coverage during SRAM Testing.

[BibT_eX]

[DOI]

Proceedings of the 22nd Asian Test Symposium, 2013

2012

Efficiency evaluation of parametric failure mitigation techniques for reliable SRAM operation.

[BibT_eX]

[DOI]

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2011

New reliability mechanisms in memory design for sub-22nm technologies.

[BibT_eX]

[DOI]

Proceedings of the 17th IEEE International On-Line Testing Symposium (IOLTS 2011), 2011

Statistical analysis of 6T SRAM data retention voltage under process variation.

[BibT_eX]

[DOI]

Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011

Robustness analysis of 6T SRAMs in memory retention mode under PVT variations.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2011

Transient Noise Failures in SRAM Cells: Dynamic Noise Margin Metric.

[BibT_eX]

[DOI]

Proceedings of the 20th IEEE Asian Test Symposium, 2011

2010

Parametric failure analysis of embedded SRAMs using fast & accurate dynamic analysis.

[BibT_eX]

[DOI]

Georgios Panagopoulos

Kaushik Roy