Vincent Gravot

According to our database1, Vincent Gravot authored at least 4 papers between 2001 and 2004.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2004
A harmonic quadrature LO generator using a 90° delay-locked loop [zero-IF transceiver applications].
Proceedings of the 33rd European Solid-State Circuits Conference, 2004

2003
Digital circuit capacitance and switching analysis for ground bounce in ICs with a high-ohmic substrate.
Proceedings of the ESSCIRC 2003, 2003

2002
Methodology and experimental verification for substrate noise reduction in CMOS mixed-signal ICs with synchronous digital circuits.
IEEE J. Solid State Circuits, 2002

2001
High-level simulation of substrate noise generation from large digital circuits with multiple supplies.
Proceedings of the Conference on Design, Automation and Test in Europe, 2001


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