Kris Tiri

According to our database, Kris Tiri authored at least 29 papers between 2002 and 2010.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2010

Side-Channel Resistant Circuit Styles and Associated IC Design Flow.

Kris Tiri

Proceedings of the Secure Integrated Circuits and Systems, 2010

2007

On the complexity of side-channel attacks on AES-256 - methodology and quantitative results on cache attacks.

Michael Neve, Kris Tiri

IACR Cryptol. ePrint Arch., 2007

An Analytical Model for Time-Driven Cache Attacks.

Kris Tiri, Onur Aciiçmez, Michael Neve, Flemming Andersen

Proceedings of the Fast Software Encryption, 14th International Workshop, 2007

Side-Channel Attack Pitfalls.

Kris Tiri

Proceedings of the 44th Design Automation Conference, 2007

Masking and Dual-Rail Logic Don't Add Up.

Patrick Schaumont, Kris Tiri

Proceedings of the Cryptographic Hardware and Embedded Systems, 2007

2006

A digital design flow for secure integrated circuits.

Kris Tiri, Ingrid Verbauwhede

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

Clock-skew-optimization methodology for substrate-noise reduction with supply-current folding.

Mustafa Badaroglu, Kris Tiri, Geert Van der Plas, Piet Wambacq, Ingrid Verbauwhede, Stéphane Donnay, Georges G. E. Gielen, Hugo De Man

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

AES-Based Security Coprocessor IC in 0.18-$muhbox m$CMOS With Resistance to Differential Power Analysis Side-Channel Attacks.

David D. Hwang, Kris Tiri, Alireza Hodjat, Bo-Cheng Lai, Shenglin Yang, Patrick Schaumont, Ingrid Verbauwhede

IEEE J. Solid State Circuits, 2006

Securing Embedded Systems.

David Hwang, Patrick Schaumont, Kris Tiri, Ingrid Verbauwhede

IEEE Secur. Priv., 2006

Changing the Odds Against Masked Logic.

Kris Tiri, Patrick Schaumont

Proceedings of the Selected Areas in Cryptography, 13th International Workshop, 2006

Side-Channel Leakage Tolerant Architectures.

Kris Tiri, Patrick Schaumont, Ingrid Verbauwhede

Proceedings of the Third International Conference on Information Technology: New Generations (ITNG 2006), 2006

2005

A 3.84 gbits/s AES crypto coprocessor with modes of operation in a 0.18-µm CMOS technology.

Alireza Hodjat, David Hwang, Bo-Cheng Lai, Kris Tiri, Ingrid Verbauwhede

Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005

A VLSI Design Flow for Secure Side-Channel Attack Resistant ICs.

Kris Tiri, Ingrid Verbauwhede

Proceedings of the 2005 Design, 2005

Design Method for Constant Power Consumption of Differential Logic Circuits.

Kris Tiri, Ingrid Verbauwhede

Proceedings of the 2005 Design, 2005

Simulation models for side-channel information leaks.

Kris Tiri, Ingrid Verbauwhede

Proceedings of the 42nd Design Automation Conference, 2005

A side-channel leakage free coprocessor IC in 0.18µm CMOS for embedded AES-based cryptographic and biometric processing.

Kris Tiri, David D. Hwang, Alireza Hodjat, Bo-Cheng Lai, Shenglin Yang, Patrick Schaumont, Ingrid Verbauwhede

Proceedings of the 42nd Design Automation Conference, 2005

Prototype IC with WDDL and Differential Routing - DPA Resistance Assessment.

Kris Tiri, David D. Hwang, Alireza Hodjat, Bo-Cheng Lai, Shenglin Yang, Patrick Schaumont, Ingrid Verbauwhede

Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2005, 7th International Workshop, Edinburgh, UK, August 29, 2005

2004

Digital circuit capacitance and switching analysis for ground bounce in ICs with a high-ohmic substrate.

Mustafa Badaroglu, Geert Van der Plas, Piet Wambacq, Lakshmanan Balasubramanian, Kris Tiri, Ingrid Verbauwhede, Stéphane Donnay, Georges G. E. Gielen, Hugo J. De Man

IEEE J. Solid State Circuits, 2004

Synthesis of Secure FPGA Implementations.

Kris Tiri, Ingrid Verbauwhede

IACR Cryptol. ePrint Arch., 2004

Charge Recycling Sense Amplifier Based Logic: Securing Low Power Security IC's against Differential Power Analysis.

Kris Tiri, Ingrid Verbauwhede

IACR Cryptol. ePrint Arch., 2004

A Dynamic and Differential CMOS Logic Style to Resist Power and Timing Attacks on Security IC's.

Kris Tiri, Ingrid Verbauwhede

IACR Cryptol. ePrint Arch., 2004

Secure Logic Synthesis.

Kris Tiri, Ingrid Verbauwhede

Proceedings of the Field Programmable Logic and Application, 2004

Charge recycling sense amplifier based logic: securing low power security ICs against DPA [differential power analysis].

Kris Tiri, Ingrid Verbauwhede

Proceedings of the 33rd European Solid-State Circuits Conference, 2004

A Logic Level Design Methodology for a Secure DPA Resistant ASIC or FPGA Implementation.

Kris Tiri, Ingrid Verbauwhede

Proceedings of the 2004 Design, 2004

Java cryptography on KVM and its performance and security optimization using HW/SW co-design techniques.

Yusuke Matsuoka, Patrick Schaumont, Kris Tiri, Ingrid Verbauwhede

Proceedings of the 2004 International Conference on Compilers, 2004

Place and Route for Secure Standard Cell Design.

Kris Tiri, Ingrid Verbauwhede

Proceedings of the Smart Card Research and Advanced Applications VI, 2004

2003

Digital circuit capacitance and switching analysis for ground bounce in ICs with a high-ohmic substrate.

Mustafa Badaroglu, Lakshmanan Balasubramanian, Kris Tiri, Vincent Gravot, Piet Wambacq, Geert Van der Plas, Stéphane Donnay, Georges G. E. Gielen, Hugo De Man

Proceedings of the ESSCIRC 2003, 2003

Securing Encryption Algorithms against DPA at the Logic Level: Next Generation Smart Card Technology.

Kris Tiri, Ingrid Verbauwhede

Proceedings of the Cryptographic Hardware and Embedded Systems, 2003

2002

Clock tree optimization in synchronous CMOS digital circuits for substrate noise reduction using folding of supply current transients.

Mustafa Badaroglu, Kris Tiri, Stéphane Donnay, Piet Wambacq, Hugo De Man, Ingrid Verbauwhede, Georges G. E. Gielen

Proceedings of the 39th Design Automation Conference, 2002