Abhisek Pan

According to our database1, Abhisek Pan authored at least 14 papers between 2008 and 2023.

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Bibliography

2023
Kerveros: Efficient and Scalable Cloud Admission Control.
Proceedings of the 17th USENIX Symposium on Operating Systems Design and Implementation, 2023

2022
MemSweeper: virtualizing cluster memory management for high memory utilization and isolation.
Proceedings of the ISMM '22: ACM SIGPLAN International Symposium on Memory Management, 2022

2020
Protean: VM Allocation Service at Scale.
Proceedings of the 14th USENIX Symposium on Operating Systems Design and Implementation, 2020

2019
Dynamically Sharing Memory between Memcached Tenants using Tingo.
Proceedings of the 15th International Conference on emerging Networking EXperiments and Technologies, 2019

2016
Extended task queuing: active messages for heterogeneous systems.
Proceedings of the International Conference for High Performance Computing, 2016

2015
A Hardware Framework for Yield and Reliability Enhancement in Chip Multiprocessors.
ACM Trans. Embed. Comput. Syst., 2015

Runtime-driven shared last-level cache management for task-parallel programs.
Proceedings of the International Conference for High Performance Computing, 2015

2014
Variation Aware Cache Partitioning for Multithreaded Programs.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013
Imbalanced cache partitioning for balanced data-parallel programs.
Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture, 2013

2012
Integrating High Performance File Systems in a Cloud Computing Environment.
Proceedings of the 2012 SC Companion: High Performance Computing, 2012

2009
A study on impact of loading effect on capacitive crosstalk noise.
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

A study on impact of aggressor de-rating in the context of multiple crosstalk effects in circuits.
Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, 2009

Improving yield and reliability of chip multiprocessors.
Proceedings of the Design, Automation and Test in Europe, 2009

2008
A Low Cost Scheme for Reducing Silent Data Corruption in Large Arithmetic Circuit.
Proceedings of the 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 2008


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