Wei-Han Cho

According to our database1, Wei-Han Cho authored at least 6 papers between 2015 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
A Millimeter-Wave CMOS Transceiver With Digitally Pre-Distorted PAM-4 Modulation for Contactless Communications.
IEEE J. Solid State Circuits, 2019

A 7.5-mW 10-Gb/s 16-QAM wireline transceiver with carrier synchronization and threshold calibration for mobile inter-chip communications in 16-nm FinFET.
Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip, 2019

2017
A 16-Gb/s 14.7-mW Tri-Band Cognitive Serial Link Transmitter With Forwarded Clock to Enable PAM-16/256-QAM and Channel Response Detection.
IEEE J. Solid State Circuits, 2017

2016
A 16Gb/s 14.7mW tri-band cognitive serial link transmitter with forwarded clock to enable PAM-16 / 256-QAM and channel response detection in 28 nm CMOS.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

10.2 A 38mW 40Gb/s 4-lane tri-band PAM-4 / 16-QAM transceiver in 28nm CMOS for high-speed Memory interface.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2015
A 5.4-mW 4-Gb/s 5-band QPSK transceiver for frequency-division multiplexing memory interface.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015


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