Weiwen Chen

According to our database1, Weiwen Chen authored at least 21 papers between 2017 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
Devignet: High-Resolution Vignetting Removal via a Dual Aggregated Fusion Transformer with Adaptive Channel Expansion.
Proceedings of the Thirty-Eighth AAAI Conference on Artificial Intelligence, 2024

2023
CLIP Guided Image-perceptive Prompt Learning for Image Enhancement.
CoRR, 2023

UWFormer: Underwater Image Enhancement via a Semi-Supervised Multi-Scale Transformer.
CoRR, 2023

ShaDocFormer: A Shadow-attentive Threshold Detector with Cascaded Fusion Refiner for document shadow removal.
CoRR, 2023

Data Augmentation Method Based on Partial Noise Diffusion Strategy for One-Class Defect Detection Task.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2023

2021
Research on the Influence Factors of Designer's Emotion in the Design Process.
Proceedings of the Design, User Experience, and Usability: UX Research and Design, 2021

Toward a Theory-Driven Model of Emotional Interaction Design in Mobile Games Research.
Proceedings of the HCI in Games: Experience Design and Game Mechanics, 2021

User Experience Design Method from the Perspective of Scalability.
Proceedings of the Advances in Usability, User Experience, Wearable and Assistive Technology, 2021

2020
A Methodological Approach to Create Interactive Art in Artificial Intelligence.
Proceedings of the HCI International 2020 - Late Breaking Papers: Cognition, Learning and Games, 2020

2019
Redesigning pipeline when architecting STT-RAM as registers in rad-hard environment.
Sustain. Comput. Informatics Syst., 2019

Queuing theory guided performance evaluation and energy optimization for a reconfigurable high speed device interconnected bus.
Sustain. Comput. Informatics Syst., 2019

2018
面向MLC STT-RAM的寄存器分配策略优化研究 (Optimization of Register Allocation Strategy for MLC STT-RAM).
计算机科学, 2018

Efficient energy management by exploiting retention state for self-powered nonvolatile processors.
J. Syst. Archit., 2018

Low power driven loop tiling for RRAM crossbar-based CNN.
Proceedings of the 33rd Annual ACM Symposium on Applied Computing, 2018

A peripheral circuit reuse structure integrated with a retimed data flow for low power RRAM crossbar-based CNN.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Power optimization through peripheral circuit reusing integrated with loop tiling for RRAM crossbar-based CNN.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
State-Transition-Aware Spilling Heuristic for MLC STT-RAM-Based Registers.
VLSI Design, 2017

Pipeline Optimizations of Architecting STT-RAM as Registers in Rad-Hard Environment.
Proceedings of the 2017 IEEE Trustcom/BigDataSE/ICESS, Sydney, Australia, August 1-4, 2017, 2017

Queuing Theory-Guided Performance Evaluation for a Reconfigurable High-Speed Device Interconnected Bus.
Proceedings of the 2017 IEEE Trustcom/BigDataSE/ICESS, Sydney, Australia, August 1-4, 2017, 2017

Retention state-enabled and progress-driven energy management for self-powered nonvolatile processors.
Proceedings of the 23rd IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2017

Retention state-aware energy management for efficient nonvolatile processors: work-in-progress.
Proceedings of the Twelfth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis Companion, 2017


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