Xiaoxiao Wang

Affiliations:
  • Beihang University, Beijing, China


According to our database1, Xiaoxiao Wang authored at least 27 papers between 2008 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Bibliography

2020
Interconnect-Based PUF With Signature Uniqueness Enhancement.
IEEE Trans. Very Large Scale Integr. Syst., 2020

NBTI and HCI Aging Prediction and Reliability Screening During Production Test.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

2019
System-Level Counterfeit Detection Using On-Chip Ring Oscillator Array.
IEEE Trans. Very Large Scale Integr. Syst., 2019

ZeroScreen: A Novel Structure for IC Reliability Screening at Time-Zero.
Proceedings of the 37th IEEE VLSI Test Symposium, 2019

2018
An On-Chip Dynamically Obfuscated Wrapper for Protecting Supply Chain Against IP and IC Piracies.
IEEE Trans. Very Large Scale Integr. Syst., 2018

Secure Scan and Test Using Obfuscation Throughout Supply Chain.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

AES Design Improvements Towards Information Security Considering Scan Attack.
Proceedings of the 17th IEEE International Conference On Trust, 2018

CIPA: Concurrent IC and PCB Authentication Using On-chip Ring Oscillator Array.
Proceedings of the 27th IEEE Asian Test Symposium, 2018

2017
TRO: An On-Chip Ring Oscillator-Based GHz Transient IR-Drop Monitor.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

Dynamically obfuscated scan for protecting IPs against scan-based attacks throughout supply chain.
Proceedings of the 35th IEEE VLSI Test Symposium, 2017

iPUF: Interconnect PUF with Self-Masking Circuit for Performance Enhancement.
Proceedings of the 18th International Workshop on Microprocessor and SOC Test and Verification, 2017

DOST: Dynamically obfuscated wrapper for split test against IC piracy.
Proceedings of the 2017 Asian Hardware Oriented Security and Trust Symposium, 2017

2016
A Novel Peak Power Supply Noise Measurement and Adaptation System for Integrated Circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2016

An efficient all-digital IR-Drop Alarmer for DVFS-based SoC.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

AES design improvement towards information safety.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Enhancing noise sensitivity of embedded SRAMs for robust true random number generation in SoCs.
Proceedings of the 2016 IEEE Asian Hardware-Oriented Security and Trust, 2016

2015
Aging Adaption in Integrated Circuits Using a Novel Built-In Sensor.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Speed Binning Using Machine Learning And On-chip Slack Sensors.
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015

2014
On-chip sensor selection for effective speed-binning.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

2012
Design and Analysis of a Delay Sensor Applicable to Process/Environmental Variations and Aging Measurements.
IEEE Trans. Very Large Scale Integr. Syst., 2012

Radic: A standard-cell-based sensor for on-chip aging and flip-flop metastability measurements.
Proceedings of the 2012 IEEE International Test Conference, 2012

2010
Novel Physical Unclonable Function with process and environmental variations.
Proceedings of the Design, Automation and Test in Europe, 2010

2009
A novel architecture for on-chip path delay measurement.
Proceedings of the 2009 IEEE International Test Conference, 2009

2008
Path-RO: a novel on-chip critical path delay measurement under process variations.
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

Power supply signal calibration techniques for improving detection resolution to hardware Trojans.
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

Detecting Malicious Inclusions in Secure Hardware: Challenges and Solutions.
Proceedings of the IEEE International Workshop on Hardware-Oriented Security and Trust, 2008

Hardware Trojan Detection and Isolation Using Current Integration and Localized Current Analysis.
Proceedings of the 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 2008


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