Xin Li

According to our database, Xin Li authored at least 23 papers between 2019 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2025

Full-Array Boolean Logic CIM Macro With Self-Recycling 10T-SRAM Cell for AES Systems.

Xin Li, Ying Pan, Qian Jin, Lintao Chen, Yang Lou, Baofa Wu, Jiajun Long, Yongliang Zhou, Chunyu Peng, Xiulong Wu, Zhiting Lin

IEEE Trans. Very Large Scale Integr. Syst., August, 2025

A 28-nm 9T1C SRAM-Based CIM Macro With Hierarchical Capacitance Weighting and Two-Step Capacitive Comparison ADCs for CNNs.

Zhiting Lin, Runru Yu, Yunhao Li, Miao Long, Yu Liu, Jianxing Zhou, Da Huo, Qingchuan Zhu, Yue Zhao, Lintao Chen, Chunyu Peng, Qiang Zhao, Xin Li, Chenghu Dai, Xiulong Wu

IEEE Trans. Very Large Scale Integr. Syst., July, 2025

8T-SRAM Computing-in-Memory Macro with Bitline Leakage Compensation.

Chunyu Peng, Junbo Chen, Mengyi Zhao, Wenjuan Lu, Zhiting Lin, Licai Hao, Xin Li, Chenghu Dai, Xiulong Wu

Circuits Syst. Signal Process., July, 2025

A High-Performance and High-Robustness Triple-Node-Upset Tolerant Latch Based on Redundant-Node Hardening.

Qiang Zhao, Qingyi Liu, Xinyi Zhang, Licai Hao, Xin Li, Shengyue Zhang, Chunyu Peng, Zhiting Lin, Xiulong Wu

IEEE Trans. Very Large Scale Integr. Syst., May, 2025

A low-power, area-efficient digital decimation filter with column-shared counter topology for CMOS image sensor.

Qiang Zhao, Jianmin Zhang, Shiqi Dang, Bin Qiang, Xiuying Wang, Xin Li, Zhigang Li, Chunyu Peng, Zhiting Lin, Xiulong Wu

Microelectron. J., 2025

A residual pulse broadening interpolation quantization column-level ADC architecture for CMOS image sensors.

Qiang Zhao, Ziming Wang, Chunhui Fan, Bin Qiang, Jitao Xu, Xin Li, Zhigang Li, Licai Hao, Chunyu Peng, Zhiting Lin, Xiulong Wu

Microelectron. J., 2025

MTJ based Temperature-Adaptive VCO (TAVCO) for Compensating CP-PLL Frequency Drift.

Yongliang Zhou, Jingxue Zhong, Yingxue Sun, Chengxing Dai, Weizhe Tan, Chunyu Peng, Wenjuan Lu, Xin Li, Zhiting Lin, Xiulong Wu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

MTJ based temperature compensated beta multiplier Voltage Reference.

Yongliang Zhou, Yingxue Sun, Jingxue Zhong, Chengxing Dai, Weizhe Tan, Chunyu Peng, Xin Li, Zhigang Li, Zhiting Lin, Xiulong Wu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

TSCIM: A 28nm Transposed Stochastic CIM Macro for On-Chip Training and Inference.

Yu Liu, Yang Lou, Kangkang Mao, Xin Li, Chenghu Dai, Xiulong Wu, Zhiting Lin

Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

A Floating-Point SRAM-based CIM Macro with Asynchronous Normalization and Parallel Sorting Alignment.

Zhiting Lin, Xin Wang, Xiaofeng Song, Dongcheng Wang, Rongtao Li, Shichen Yu, Wenqiang Zhang, Yu Liu, Xin Li, Xiulong Wu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

2024

An 11-bit two-step column-shared ADC based on Flash/SS architecture for CMOS image sensor.

Qiang Zhao, Jitao Xu, Chunhui Fan, Ziming Wang, Ruitong Hu, Xin Li, Zhigang Li, Licai Hao, Chunyu Peng, Zhiting Lin, Xiulong Wu

Microelectron. J., 2024

High energy efficient and configurable CIM macro for image processing.

Chunyu Peng, Shengyuan Yan, Huayi Ding, Yana Wang, Wenjuan Lu, Chenghu Dai, Xin Li, Wei Hu, Xiulong Wu

Microelectron. J., 2024

A 28-nm 9T SRAM-based CIM macro with capacitance weighting module and redundant array-assisted ADC.

Zhiting Lin, Runru Yu, Da Huo, Qingchuan Zhu, Miao Long, Yongqi Qin, Yanchun Liu, Lintao Chen, Simin Wang, Ting Wang, Yousheng Xing, Zeshi Wen, Yu Liu, Xin Li, Chenghu Dai, Qiang Zhao, Chunyu Peng, Xiulong Wu

Microelectron. J., 2024

Corrigendum to "A 9T-SRAM based computing-in-memory with redundant unit and digital operation for boolean logic and MAC" [145, March 2024, 106124.

Xin Li, Mengya Gao, Zihua Ren, Kefeng Yu, Wenjuan Lu, Chenghu Dai, Wei Hu, Chunyu Peng, Xiulong Wu

Microelectron. J., 2024

A 9T-SRAM based computing-in-memory with redundant unit and digital operation for boolean logic and MAC.

Xin Li, Mengya Gao, Zihua Ren, Kefeng Yu, Wenjuan Lu, Chenghu Dai, Wei Hu, Chunyu Peng, Xiulong Wu

Microelectron. J., 2024

A Timing-Shared Adaptive Sensing Methodology for Low-Voltage SRAM.

Yongliang Zhou, Zhen Yang, Yiming Wei, Xiao Lin, Saiai Wu, Wenjuan Lu, Chunyu Peng, Xin Li, Xiulong Wu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2022

Hierarchical parallel difference-equalization and channels regrouping based estimation of timing skew for time-interleaved ADCs.

He Zhi, Xin Li, Jiayan Yan, Lizhen Zhang, Chun Yang, Jianhui Wu

Microelectron. J., 2022

2021

A Background Correlation-Based Timing Skew Estimation Method for Time-Interleaved ADCs.

Xin Li, Jianhui Wu, Christian Vogel

IEEE Access, 2021

Two-Stage Difference-Based Estimation Method for Timing Skew in TI-ADCs.

Xin Li, Christian Vogel, Jianhui Wu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020

A Low-Spur MASH Delta-Sigma Modulator With an Adaptive Length Extension Technique.

Xin Ding, Chenggang Yan, Xin Li, Jianhui Wu

IEEE Trans. Circuits Syst., 2020

A Review on Calibration Methods of Timing-Skew in Time-Interleaved ADCs.

Xin Li, Cheng Huang, Desheng Ding, Jianhui Wu

J. Circuits Syst. Comput., 2020

Active Noise Shaping SAR ADC Based on ISDM with the 5MHz Bandwidth.

Bo Gao, Xin Li, Chenggang Yan, Jianhui Wu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019

A digital-mixing-based method for timing skew estimation in time-interleaved ADCs.

Xin Li, Desheng Ding, Chenggang Yan, Jianhui Wu

Microelectron. J., 2019