Yan-Yu Huang

According to our database¹, Yan-Yu Huang authored at least 7 papers between 2011 and 2017.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

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Bibliography

2017

Ultrahigh-Density 256-Channel Neural Sensing Microsystem Using TSV-Embedded Neural Probes.

[BibT_eX]

[DOI]

IEEE Trans. Biomed. Circuits Syst., 2017

2016

An ultra-high-density 256-channel/25mm2 neural sensing microsystem using TSV-embedded neural probes.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015

3.5 A 16-to-40Gb/s quarter-rate NRZ/PAM4 dual-mode transmitter in 14nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2014

A 2GHz-to-7.5GHz quadrature clock-generator using digital delay locked loops for multi-standard I/Os in 14nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the Symposium on VLSI Circuits, 2014

2012

A Fully-Integrated High-Power Linear CMOS Power Amplifier With a Parallel-Series Combining Transformer.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2012

A Triple-Mode Balanced Linear CMOS Power Amplifier Using a Switched-Quadrature Coupler.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2012

2011

Highly Linear RF CMOS Variable Attenuators With Adaptive Body Biasing.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2011

Yan-Yu Huang

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