Yanbo Zhang
Orcid: 0009-0006-0861-8181Affiliations:
- Xidian University, School of Integrated Circuits, Xi'an, China
According to our database1,
Yanbo Zhang authored at least 30 papers
between 2018 and 2026.
Collaborative distances:
Collaborative distances:
Timeline
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on orcid.org
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Bibliography
2026
A Single-Channel 1-3 MASH SAR-Assisted Pipeline ADC With Residue Amplifier Error Shaping.
IEEE J. Solid State Circuits, May, 2026
IEEE Trans. Circuits Syst. II Express Briefs, April, 2026
Multi-Term Cosine-Sum Windows-Assisted DFT-IDFT-Based Minimum-Segment Calibration for SAR ADCs.
IEEE Trans. Circuits Syst. I Regul. Pap., March, 2026
An SAR-Assisted Noise-Shaping Pipeline ADC With Gain-Boosted Cascoded Floating Inverter Amplifier.
IEEE Trans. Very Large Scale Integr. Syst., January, 2026
A 67 dB-SNDR 1.6 GS/s fully passive SAR-assisted noise-shaping pipelined ADC with gain error shaping.
Sci. China Inf. Sci., 2026
2025
A MASH SAR ADC With Nonlinearity Error Shaping Achieving 101.6-dB SFDR and 83.6-dB SNDR.
IEEE Trans. Circuits Syst. II Express Briefs, December, 2025
A Second-Order Continuous-Time Noise-Shaping SAR ADC With Ping-Pong DACs and G<sub>m</sub>-OTA-C Integrator.
IEEE Trans. Very Large Scale Integr. Syst., July, 2025
An Intrinsically PVT Robust 10-bit 2.6-GS/s Dynamic Pipelined ADC With Dual-Path Time-Assisted Residue Generation Scheme.
IEEE J. Solid State Circuits, July, 2025
A 36.8-μW 66 nV/√Hz 85.7 dB-System-SNDR Reconfigurable Single-Channel ExG Acquisition System for Bio-Sensor Modules.
IEEE Trans. Circuits Syst. I Regul. Pap., March, 2025
A 20-bit 1MS/s SAR ADC suppressing the dynamic error caused by thermal effect in the static comparator.
Microelectron. J., 2025
A dynamic comparator exploiting floating inverter preamplifier with stacked cross coupled feedback inverter for 16-bit 1 MS/s SAR ADC.
Microelectron. J., 2025
Exponential-incremental quantization-based calibration for capacitor mismatch in high-precision SAR ADCs.
Microelectron. J., 2025
An 18-Bit 183.9dB-FoMS, DR MES/Calibration-Free Scalable Zoom ADC Using Fully Passive Coarse Modulator and Gain-Linearity-Enhanced FIA with Sub-1ppm-THD at Full Scale Input in 65-nm CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2025
2024
A 182.9-dB FoM 108.2-dB SFDR Power/Bandwidth Configurable Fully Dynamic Switched-Capacitor Zoom ADC With Interstage Leakage Shaping.
IEEE Trans. Circuits Syst. I Regul. Pap., September, 2024
A 14b 180MS/s Pipeline-SAR ADC With Adaptive-Region-Selection Technique and Gain Error Calibration.
IEEE Trans. Circuits Syst. II Express Briefs, January, 2024
A high constancy and noise suppression voltage shift generator in SEIR-based BIST circuit for ADC linearity test.
Microelectron. J., 2024
A 2nd-order noise-shaping SAR-assisted pipeline ADC with order-boosted gain-error-shaping.
Microelectron. J., 2024
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2024
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2024
2023
A 44-μW, 91.3-dB SNDR DT Δ Σ Modulator With Second-Order Noise-Shaping SAR Quantizer.
IEEE Trans. Circuits Syst. I Regul. Pap., September, 2023
A Single-Channel 70dB-SNDR 100MHz-BW 4<sup>th</sup>-Order Noise-Shaping Pipeline SAR ADC with Residue Amplifier Error Shaping.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
A Single-Channel 2.6GS/s 10b Dynamic Pipelined ADC with Time-Assisted Residue Generation Scheme Achieving Intrinsic PVT Robustness.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
An 83.6dB-SNDR 101.6dB-SFDR 4<sup>th</sup>-Order Noise-Shaping SAR with 2<sup>nd</sup>-Order Nonlinearity Error Shaping.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023
A $142.8-\mu \text{W}$ 98.1dB-SNDR Power/Bandwidth Configurable Fully Dynamic Discrete-Time Zoom ADC with Interstage Leakage Shaping.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023
A 77.8dB-SNDR 25MHz-BW 2<sup>nd</sup>-order NS Pipelined SAR ADC with 4<sup>th</sup>-order Gain-Error-Shaping.
Proceedings of the 15th IEEE International Conference on ASIC, 2023
2022
IEEE Trans. Circuits Syst. II Express Briefs, 2022
A 20 MHz Bandwidth 79 dB SNDR SAR-Assisted Noise-Shaping Pipeline ADC With Gain and Offset Calibrations.
IEEE J. Solid State Circuits, 2022
2021
A 79.1dB-SNDR 20MHz-BW 2<sup>nd</sup>-Order SAR-Assisted Noise-Shaping Pipeline ADC with Gain and Offset Background Calibrations Based on Convergence Enhanced Split-Over-Time Architecture.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2021
2020
A 2nd-Order Noise-Shaping SAR ADC With Lossless Dynamic Amplifier Assisted Integrator.
IEEE Trans. Circuits Syst. II Express Briefs, 2020
2018
Microelectron. J., 2018