Minglei Zhang
Orcid: 0000-0001-7220-0464
According to our database1,
Minglei Zhang
authored at least 27 papers
between 2014 and 2024.
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Bibliography
2024
6.8 A 256×192-Pixel 30fps Automotive Direct Time-of-Flight LiDAR Using 8× Current-Integrating-Based TIA, Hybrid Pulse Position/Width Converter, and Intensity/CNN-Guided 3D Inpainting.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
22.1 A 12GS/s 12b 4× Time-Interleaved Pipelined ADC with Comprehensive Calibration of TI Errors and Linearized Input Buffer.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
2023
A 52.5-dB 2× Time-Interleaved 2.8-GS/s SAR ADC With 5-bit/Cycle Time-Domain Quantization and a Compact Signal DAC.
IEEE J. Solid State Circuits, December, 2023
A 79.5dB-SNDR Pipelined-SAR ADC with a Linearity-Shifting 32× Dynamic Amplifier and Mounted-Over-Die Bypass Capacitors.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
A 2x-lnterleaved 9b 2.8G8S/s 5b/cycle SAR ADC with Linearized Configurable V2T Buffer Achieving >50dB SNDR at 3GHz Input.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
A Single-Channel 2.6GS/s 10b Dynamic Pipelined ADC with Time-Assisted Residue Generation Scheme Achieving Intrinsic PVT Robustness.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
A Single-Channel 12b 2GS/s PVT-Robust Pipelined ADC with Critically Damped Ring Amplifier and Time-Domain Quantizer.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
Intelligent electronic information equipment maintenance and testing system based on general test instruments.
Proceedings of the 4th International Conference on Big Data & Artificial Intelligence & Software Engineering, 2023
A Double-Mode Sparse Compute-In-Memory Macro with Reconfigurable Single and Dual Layer Computation.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2023
2021
Forecasting the Trend of COVID-19 Considering the Impacts of Public Health Interventions: An Application of FGM and Buffer Level.
J. Heal. Informatics Res., 2021
A 20GS/s 8b Time-Interleaved Time-Domain ADC with Input-Independent Background Timing Skew Calibration.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021
2020
Background Calibration of Bit Weights in Pipelined-SAR ADCs Using Paired Comparators.
IEEE Trans. Very Large Scale Integr. Syst., 2020
An 8-Bit 10-GS/s 16× Interpolation-Based Time-Domain ADC With <1.5-ps Uncalibrated Quantization Steps.
IEEE J. Solid State Circuits, 2020
A Temperature-Stabilized Single-Channel 1-GS/s 60-dB SNDR SAR-Assisted Pipelined ADC With Dynamic Gm-R-Based Amplifier.
IEEE J. Solid State Circuits, 2020
16.2 A 4× Interleaved 10GS/s 8b Time-Domain ADC with 16× Interpolation-Based Inter-Stage Gain Achieving >37.5dB SNDR at 18GHz Input.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
2019
A 1-MHz-Bandwidth Gm-C-Based Quadrature Bandpass Sigma-Delta Modulator Achieving -153.7-dBFS/Hz NSD With Background Calibration.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
A Unified Amplifier-Based CC-CV Linear Charger for Energy-Constrained Low-Power Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2019
A 0.6-V 13-bit 20-MS/s Two-Step TDC-Assisted SAR ADC With PVT Tracking and Speed-Enhanced Techniques.
IEEE J. Solid State Circuits, 2019
A 0.6V 13b 20MS/s Two-Step TDC-Assisted SAR ADC with PVT Tracking and Speed-Enhanced Techniques.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
A 7.6mW 1GS/s 60dB SNDR Single-Channel SAR-Assisted Pipelined ADC with Temperature-Compensated Dynamic Gm-R-Based Amplifier.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
2018
A 13.56-MHz CMOS Active Rectifier With a Voltage Mode Switched-Offset Comparator for Implantable Medical Devices.
IEEE Trans. Very Large Scale Integr. Syst., 2018
Int. J. Comput. Commun. Control, 2018
2017
A 0.8-1.2 V 10-50 MS/s 13-bit Subranging Pipelined-SAR ADC Using a Temperature-Insensitive Time-Based Amplifier.
IEEE J. Solid State Circuits, 2017
An energy-efficient SAR ADC using a single-phase clocked dynamic comparator with energy and speed enhanced technique.
IEICE Electron. Express, 2017
2014
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014