Yang Du

Affiliations:
  • Qualcomm Research, San Diego, CA, USA
  • Columbia University, New York, NY, USA (PhD 1994)


According to our database1, Yang Du authored at least 14 papers between 2013 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2017
Full Chip Impact Study of Power Delivery Network Designs in Gate-Level Monolithic 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

Tier Degradation of Monolithic 3-D ICs: A Power Performance Study at Different Technology Nodes.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

Shrunk-2-D: A Physical Design Methodology to Build Commercial-Quality Monolithic 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

2016
Adaptive Regression-Based Thermal Modeling and Optimization for Monolithic 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

BEOL stack-aware routability prediction from placement using data mining techniques.
Proceedings of the 34th IEEE International Conference on Computer Design, 2016

2015
Placement-Driven Partitioning for Congestion Mitigation in Monolithic 3D IC Designs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

3D VLSI: A Scalable Integration Beyond 2D.
Proceedings of the 2015 Symposium on International Symposium on Physical Design, ISPD 2015, Monterey, CA, USA, March 29, 2015

Tier-partitioning for power delivery vs cooling tradeoff in 3D VLSI for mobile applications.
Proceedings of the 52nd Annual Design Automation Conference, 2015

3DIC benefit estimation and implementation guidance from 2DIC implementation.
Proceedings of the 52nd Annual Design Automation Conference, 2015

2014
Design and CAD methodologies for low power gate-level monolithic 3D ICs.
Proceedings of the International Symposium on Low Power Electronics and Design, 2014

Full chip impact study of power delivery network designs in monolithic 3D ICs.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

Fast and Accurate Thermal Modeling and Optimization for Monolithic 3D ICs.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

Power-Performance Study of Block-Level Monolithic 3D-ICs Considering Inter-Tier Performance Variations.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013
High-density integration of functional modules using monolithic 3D-IC technology.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013


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