Sandeep Kumar Samal

According to our database1, Sandeep Kumar Samal authored at least 16 papers between 2013 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2019
Entropy Production-Based Full-Chip Fatigue Analysis: From Theory to Mobile Applications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

2018
Design and architectural co-optimization of monolithic 3D liquid state machine-based neuromorphic processor.
Proceedings of the 55th Annual Design Automation Conference, 2018

2017
Full Chip Impact Study of Power Delivery Network Designs in Gate-Level Monolithic 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

Tier Degradation of Monolithic 3-D ICs: A Power Performance Study at Different Technology Nodes.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

TSV-Based 3-D ICs: Design Methods and Tools.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

Improving Performance under Process and Voltage Variations in Near-Threshold Computing Using 3D ICs.
ACM J. Emerg. Technol. Comput. Syst., 2017

Full chip power benefits with negative capacitance FETs.
Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017

2016
Adaptive Regression-Based Thermal Modeling and Optimization for Monolithic 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

Machine Learning Based Variation Modeling and Optimization for 3D ICs.
J. Inform. and Commun. Convergence Engineering, 2016

How to Cope with Slow Transistors in the Top-tier of Monolithic 3D ICs: Design Studies and CAD Solutions.
Proceedings of the 2016 International Symposium on Low Power Electronics and Design, 2016

Tier partitioning strategy to mitigate BEOL degradation and cost issues in monolithic 3D ICs.
Proceedings of the 35th International Conference on Computer-Aided Design, 2016

2015
A Novel Entropy Production Based Full-Chip TSV Fatigue Analysis.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

2014
Design Challenges and Solutions for Ultra-High-Density Monolithic 3D ICs.
J. Inform. and Commun. Convergence Engineering, 2014

Full chip impact study of power delivery network designs in monolithic 3D ICs.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

Fast and Accurate Thermal Modeling and Optimization for Monolithic 3D ICs.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013
Design and analysis of ultra low power processors using sub/near-threshold 3D stacked ICs.
Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013


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