Yaqing Chi

According to our database1, Yaqing Chi authored at least 17 papers between 2010 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2022
Implementation of Radiation Hardened Flip-Flops Based on Novel Fishbone Layouts.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021
Current mirror with charge dissipation transistor for analogue single-event transient mitigation in space application.
IET Circuits Devices Syst., 2021

2020
Investigation of Heavy-Ion Induced Single-Event Transient in 28 nm Bulk Inverter Chain.
Symmetry, 2020

MSIFF: A radiation-hardened flip-flop via interleaving master-slave stage layout topology.
IEICE Electron. Express, 2020

Research on the influences of well structure on dose rate effects in 65nm CMOS circuit.
IEICE Electron. Express, 2020

2019
Supply Voltage and Temperature Dependence of Single-Event Transient in 28-nm FDSOI MOSFETs.
Symmetry, 2019

Characterization of P-hit and N-hit single-event transient using heavy ion microbeam.
IEICE Electron. Express, 2019

28nm Fault-Tolerant Hardening-by-Design Frequency Divider for Reducing Soft Errors in Clock and Data Recovery.
IEEE Access, 2019

A Single-Event Upset Evaluation Approach Using Ion-Induced Sensitive Area.
Proceedings of the 13th IEEE International Conference on ASIC, 2019

2017
Modeling the impact of process and operation variations on the soft error rate of digital circuits.
Sci. China Inf. Sci., 2017

Comparison of single-event upset generated by heavy ion and pulsed laser.
Sci. China Inf. Sci., 2017

A Programmable Pre-emphasis Transmitter for SerDes in 40 nm CMOS.
Proceedings of the Computer Engineering and Technology - 21st CCF Conference, 2017

2014
Research on single-event transient mechanism in a novel SOI CMOS technology.
IEICE Electron. Express, 2014

A low contact resistance graphene field effect transistor with single-layer-channel and multi-layer-contact.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2014

2013
A Scan Chain Based SEU Test Method for Microprocessors.
Proceedings of the Computer Engineering and Technology - 17th CCF Conference, 2013

2010
Analysis of negative differential conductance of single-island single-electron transistors owing to Coulomb oscillations.
IET Circuits Devices Syst., 2010

Reconfigurable logic gate implemented by suspended-gate single-electron transistors.
Proceedings of the 5th IEEE International Conference on Nano/Micro Engineered and Molecular Systems, 2010


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