Yehuda Kra

According to our database, Yehuda Kra authored at least 12 papers between 1993 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2026

GenMClass: Design and comparative analysis of genome classifier-on-chip platform.

Daria Bromot, Yehuda Kra, Zuher Jahshan, Esteban Garzón, Adam Teman, Leonid Yavits

J. Syst. Archit., 2026

2025

KSPiM: A 65nm Processing-near-Memory State-Space Accelerator for Keyword Spotting.

Almog Sharoni, Zuher Jahshan, Yehuda Kra, Adam Teman, Leonid Yavits

Proceedings of the 2025 Cross-Disciplinary Conference on Memory-Centric Computing (CCMCC), 2025

2024

HAMSA-DI: A Low-Power Dual-Issue RISC-V Core Targeting Energy-Efficient Embedded Systems.

Yehuda Kra, Yonatan Shoshan, Yehuda Rudin, Adam Teman

IEEE Trans. Circuits Syst. I Regul. Pap., January, 2024

Basecalling by Statistical Profiling and Hardware-Accelerated Convolutional Neural Network.

Yehuda Kra, Yehuda Rudin, Alexander Fish, Adam Teman

Proceedings of the 19th Conference on Ph.D Research in Microelectronics and Electronics, 2024

Selfie5: An Autonomous, Self-Contained Verification Approach for High-Throughput Random Testing of Programmable Processors.

Yehuda Kra, Naama Kra, Adam Teman

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

2022

Silicon-Proven Clockless Wave-Propagated Pipelining for High-Throughput, Energy-Efficient Processing.

Yehuda Kra, Adam Teman

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

A RISC-V-based Research Platform for Rapid Design Cycle.

Esteban Garzón, Roman Golman, Odem Harel, Tzachi Noy, Yehuda Kra, Asaf Pollock, Slava Yuzhaninov, Yonatan Shoshan, Yehuda Rudin, Yoav Weizman, Marco Lanuzza, Adam Teman

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

SerOpt: Transistor Sizing Algorithm and Optimization Utility for Minimizing Soft Error Rate.

Yehuda Kra, Yoav Weizman, Adam Teman

Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022

2021

WP 2.0: Signoff-Quality Implementation and Validation of Energy-Efficient Clock-Less Wave Propagated Pipelining.

Yehuda Kra, Tzachi Noy, Adam Teman

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020

Physically Aware Affinity-Driven Multiplier Implementation.

Or Maltabashi, Yehuda Kra, Adam Teman

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

WavePro: Clock-less Wave-Propagated Pipeline Compiler for Low-Power and High-Throughput Computation.

Yehuda Kra, Tzachi Noy, Adam Teman

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

1993

A Cross-Debugging Method for Hardware/Software Co-design Environments.

Yehuda Kra

Proceedings of the 30th Design Automation Conference. Dallas, 1993