Yoav Weizman
According to our database1,
Yoav Weizman
authored at least 24 papers
between 2004 and 2024.
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Bibliography
2024
Revisiting Dynamic Logic - A True Candidate for Energy-Efficient Cryogenic Operation in Nanoscaled Technologies.
IEEE Trans. Circuits Syst. I Regul. Pap., March, 2024
2023
Analytical Side Channel EM Models, Extending Simulation Abilities for ICs, and Linking Physical Models to Cryptographic Metrics.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2023
Silicon Proven 1.29 μm × 1.8 μm 65nm Sub-Vt Optical Sensor for Hardware Security Applications.
IEEE Access, 2023
Toward a Monolithic Pixel Sensor for Heavy Ion Spectroscopy - Pixel Structure Design and Optimization.
IEEE Access, 2023
2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
SerOpt: Transistor Sizing Algorithm and Optimization Utility for Minimizing Soft Error Rate.
Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022
2021
Low-Cost Side-Channel Secure Standard 6T-SRAM-Based Memory With a 1% Area and Less Than 5% Latency and Power Overheads.
IEEE Access, 2021
Compact Protection Codes for protecting memory from malicious data and address manipulations.
Proceedings of the 26th IEEE European Test Symposium, 2021
2020
An SRAM-Based PUF With a Capacitive Digital Preselection for a 1E-9 Key Error Probability.
IEEE Trans. Circuits Syst., 2020
A Method to Utilize Mismatch Size to Produce an Additional Stable Bit in a Tilting SRAM-Based PUF.
IEEE Access, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2019
Silicon Proven 1.8 µm × 9.2 µm 65-nm Digital Bit Generator for Hardware Security Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2019
Compact Sub-Vt Optical Sensor for the Detection of Fault Injection in Hardware Security Applications.
Proceedings of the 10th IFIP International Conference on New Technologies, 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Power Analysis Resilient SRAM Design Implemented with a 1% Area Overhead Impedance Randomization Unit for Security Applications.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019
A Highly Reliable SRAM PUF with a Capacitive Preselection Mechanism and pre-ECC BER of 7.4E-10.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019
2018
IEEE Trans. Very Large Scale Integr. Syst., 2018
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
Utilization of Process and Supply Voltage Random Variations for Random Bit Generation.
Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018
2017
Proceedings of the International SoC Design Conference, 2017
Vulnerability of secured IoT memory against localized back side laser fault injection.
Proceedings of the Seventh International Conference on Emerging Security Technologies, 2017
2013
Proceedings of the 19th IEEE International Symposium on Asynchronous Circuits and Systems, 2013
2004
Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004