Esteban Garzón

Orcid: 0000-0002-5862-2246

According to our database1, Esteban Garzón authored at least 44 papers between 2016 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

Online presence:

On csauthors.net:

Bibliography

2026
NV-PCAM: Non-Volatile Precharge-Free Content-Addressable Memory.
IEEE Trans. Circuits Syst. I Regul. Pap., March, 2026

SPARCAM: Sparse matrix multiplication accelerator using multi-port dynamic CAM.
J. Syst. Archit., 2026

CADM: Content addressable commodity off-the-shelf DRAM-based genome classifier.
J. Syst. Archit., 2026

GenMClass: Design and comparative analysis of genome classifier-on-chip platform.
J. Syst. Archit., 2026

PatBiNN: A 65 nm Processing-in-CAM Based BNN Implementation for Pathogen Genome Classification.
Proceedings of the Design, Automation & Test in Europe Conference, 2026

2025
A 128-kbit Approximate Search-Capable Content-Addressable Memory (CAM) With Tunable Hamming Distance.
IEEE J. Solid State Circuits, August, 2025

GCOC: A Genome Classifier-On-Chip Based on Similarity Search Content Addressable Memory.
IEEE Trans. Biomed. Circuits Syst., June, 2025

CAM4: In-Memory Viral Pathogen Genome Classification Using Similarity Search Dynamic Content-Addressable Memory.
IEEE Trans. Emerg. Top. Comput., 2025

A Low-Power 4-bit Tracking-Type Analog-to-Digital Converter in SKY130 Process.
Proceedings of the 33rd IFIP/IEEE International Conference on Very Large Scale Integration, 2025

Towards Low-Power High-Performance Content-Addressable Memory: A Robust Precharge-Free Approach.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

Low Matchline Voltage Swing Content-Addressable Memory Cell.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

Non-Volatile Content-Addressable Memory For Energy-Efficient & High-Performance Search And Update Operations.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

PiC-BNN: A 128-kbit 65 nm Processing-in-CAM-Based End-to-End Binary Neural Network Accelerator.
Proceedings of the 2025 Cross-Disciplinary Conference on Memory-Centric Computing (CCMCC), 2025

2024
Designing Precharge-Free Energy-Efficient Content-Addressable Memories.
IEEE Trans. Very Large Scale Integr. Syst., December, 2024

DIPER: Detection and Identification of Pathogens Using Edit Distance-Tolerant Resistive CAM.
IEEE Trans. Computers, October, 2024

ViRAL: Vision Transformer Based Accelerator for ReAL Time Lineage Assignment of Viral Pathogens.
IEEE Access, 2024

FASTA: Revisiting Fully Associative Memories in Computer Microarchitecture.
IEEE Access, 2024

2023
A Low-Complexity Sensing Scheme for Approximate Matching Content-Addressable Memory.
IEEE Trans. Circuits Syst. II Express Briefs, October, 2023

XNOR-Bitcount Operation Exploiting Computing-In-Memory With STT-MRAMs.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2023

Efficiency of Double-Barrier Magnetic Tunnel Junction-Based Digital eNVM Array for Neuro-Inspired Computing.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2023

AM<sup>4</sup>: MRAM Crossbar Based CAM/TCAM/ACAM/AP for In-Memory Computing.
IEEE J. Emerg. Sel. Topics Circuits Syst., March, 2023

SIMPLY+: A Reliable STT-MRAM-Based Smart Material Implication Architecture for In-Memory Computing.
IEEE Access, 2023

Efficient Implementation of Many-Ported Memories by Using Standard-Cell Memory Approach.
IEEE Access, 2023

A Low-Energy DMTJ-Based Ternary Content- Addressable Memory With Reliable Sub-Nanosecond Search Operation.
IEEE Access, 2023

DASH-CAM: Dynamic Approximate SearcH Content Addressable Memory for genome classification.
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

STT-MRAM Technology For Energy-Efficient Cryogenic Memory Applications.
Proceedings of the 14th IEEE Latin America Symposium on Circuits and System, 2023

2022
A 0.05 mm², 350 mV, 14 nW Fully-Integrated Temperature Sensor in 180-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

AIDA: Associative In-Memory Deep Learning Accelerator.
IEEE Micro, 2022

A 0.6V$-$1.8V Compact Temperature Sensor with 0.24°C Resolution, $\pm$1.4°C Inaccuracy and 1.06nJ per Conversion.
CoRR, 2022

Adjusting Thermal Stability in Double-Barrier MTJ for Energy Improvement in Cryogenic STT-MRAMs.
CoRR, 2022

All-Analog Silicon Integration of Image Sensor and Neural Computing Engine for Image Classification.
IEEE Access, 2022

Hamming Distance Tolerant Content-Addressable Memory (HD-CAM) for DNA Classification.
IEEE Access, 2022

Voltage and Technology Scaling of DMTJ-based STT-MRAMs for Energy-Efficient Embedded Memories.
Proceedings of the 13th IEEE Latin America Symposium on Circuits and System, 2022

A RISC-V-based Research Platform for Rapid Design Cycle.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

EDAM: edit distance tolerant approximate matching content addressable memory.
Proceedings of the ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18, 2022

2021
Gain-Cell Embedded DRAM Under Cryogenic Operation - A First Study.
IEEE Trans. Very Large Scale Integr. Syst., 2021

Hamming Distance Tolerant Content-Addressable Memory (HD-CAM) for Approximate Matching Applications.
CoRR, 2021

2020
Assessment of STT-MRAMs based on double-barrier MTJs for cache applications by means of a device-to-system level simulation framework.
Integr., 2020

Reconfigurable CMOS/STT-MTJ Non-Volatile Circuit for Logic-in-Memory Applications.
Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020

2019
Exploiting Double-Barrier MTJs for Energy-Efficient Nanoscaled STT-MRAMs.
Proceedings of the 16th International Conference on Synthesis, 2019

Microprocessor Design with a Direct Bluetooth Connection in 45 nm Technology Using Microwind.
Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019

Device-to-System Level Simulation Framework for STT-DMTJ Based Cache Memory.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

Evaluating the Energy Efficiency of STT-MRAMs Based on Perpendicular MTJs with Double Reference Layers.
Proceedings of the 13th IEEE International Conference on ASIC, 2019

2016
Fast computation of Cramer-Rao Bounds for TOA.
Proceedings of the IEEE Latin American Conference on Computational Intelligence, 2016


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