Esteban Garzón

According to our database, Esteban Garzón authored at least 29 papers between 2016 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

ViRAL: Vision Transformer Based Accelerator for ReAL Time Lineage Assignment of Viral Pathogens.

Zuher Jahshan, Esteban Garzón, Leonid Yavits

IEEE Access, 2024

FASTA: Revisiting Fully Associative Memories in Computer Microarchitecture.

Esteban Garzón, Robert Hanhan, Marco Lanuzza, Adam Teman, Leonid Yavits

IEEE Access, 2024

2023

A Low-Complexity Sensing Scheme for Approximate Matching Content-Addressable Memory.

Esteban Garzón, Roman Golman, Marco Lanuzza, Adam Teman, Leonid Yavits

IEEE Trans. Circuits Syst. II Express Briefs, October, 2023

XNOR-Bitcount Operation Exploiting Computing-In-Memory With STT-MRAMs.

Ariana Musello, Esteban Garzón, Marco Lanuzza, Luis-Miguel Prócel, Ramiro Taco

IEEE Trans. Circuits Syst. II Express Briefs, March, 2023

Efficiency of Double-Barrier Magnetic Tunnel Junction-Based Digital eNVM Array for Neuro-Inspired Computing.

Tatiana Moposita, Esteban Garzón, Felice Crupi, Lionel Trojman, Andrei Vladimirescu, Marco Lanuzza

IEEE Trans. Circuits Syst. II Express Briefs, March, 2023

AM⁴: MRAM Crossbar Based CAM/TCAM/ACAM/AP for In-Memory Computing.

Esteban Garzón, Marco Lanuzza, Adam Teman, Leonid Yavits

IEEE J. Emerg. Sel. Topics Circuits Syst., March, 2023

SIMPLY+: A Reliable STT-MRAM-Based Smart Material Implication Architecture for In-Memory Computing.

Tatiana Moposita, Esteban Garzón, Raffaele De Rose, Felice Crupi, Andrei Vladimirescu, Lionel Trojman, Marco Lanuzza

IEEE Access, 2023

Efficient Implementation of Many-Ported Memories by Using Standard-Cell Memory Approach.

Hanan Marinberg, Esteban Garzón, Tzachi Noy, Marco Lanuzza, Adam Teman

IEEE Access, 2023

A Low-Energy DMTJ-Based Ternary Content- Addressable Memory With Reliable Sub-Nanosecond Search Operation.

Esteban Garzón, Leonid Yavits, Giovanni Finocchio, Mario Carpentieri, Adam Teman, Marco Lanuzza

IEEE Access, 2023

DASH-CAM: Dynamic Approximate SearcH Content Addressable Memory for genome classification.

Zuher Jahshan, Itay Merlin, Esteban Garzón, Leonid Yavits

Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

STT-MRAM Technology For Energy-Efficient Cryogenic Memory Applications.

Esteban Garzón, Leonid Yavits, Adam Teman, Marco Lanuzza

Proceedings of the 14th IEEE Latin America Symposium on Circuits and System, 2023

2022

A 0.05 mm², 350 mV, 14 nW Fully-Integrated Temperature Sensor in 180-nm CMOS.

Benjamin Zambrano, Esteban Garzón, Sebastiano Strangio, Felice Crupi, Marco Lanuzza

IEEE Trans. Circuits Syst. II Express Briefs, 2022

AIDA: Associative In-Memory Deep Learning Accelerator.

Esteban Garzón, Adam Teman, Marco Lanuzza, Leonid Yavits

IEEE Micro, 2022

A 0.6V$-$1.8V Compact Temperature Sensor with 0.24°C Resolution, $\pm$1.4°C Inaccuracy and 1.06nJ per Conversion.

Benjamin Zambrano, Esteban Garzón, Sebastiano Strangio, Giuseppe Iannaccone, Marco Lanuzza

CoRR, 2022

Adjusting Thermal Stability in Double-Barrier MTJ for Energy Improvement in Cryogenic STT-MRAMs.

Esteban Garzón, Raffaele De Rose, Felice Crupi, Lionel Trojman, Adam Teman, Marco Lanuzza

CoRR, 2022

All-Analog Silicon Integration of Image Sensor and Neural Computing Engine for Image Classification.

Benjamin Zambrano, Sebastiano Strangio, Tommaso Rizzo, Esteban Garzón, Marco Lanuzza, Giuseppe Iannaccone

IEEE Access, 2022

Hamming Distance Tolerant Content-Addressable Memory (HD-CAM) for DNA Classification.

Esteban Garzón, Roman Golman, Zuher Jahshan, Robert Hanhan, Natan Vinshtok-Melnik, Marco Lanuzza, Adam Teman, Leonid Yavits

IEEE Access, 2022

Voltage and Technology Scaling of DMTJ-based STT-MRAMs for Energy-Efficient Embedded Memories.

Esteban Garzón, Ramiro Taco, Luis-Miguel Prócel, Lionel Trojman, Marco Lanuzza

Proceedings of the 13th IEEE Latin America Symposium on Circuits and System, 2022

A RISC-V-based Research Platform for Rapid Design Cycle.

Esteban Garzón, Roman Golman, Odem Harel, Tzachi Noy, Yehuda Kra, Asaf Pollock, Slava Yuzhaninov, Yonatan Shoshan, Yehuda Rudin, Yoav Weizman, Marco Lanuzza, Adam Teman

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

EDAM: edit distance tolerant approximate matching content addressable memory.

Robert Hanhan, Esteban Garzón, Zuher Jahshan, Adam Teman, Marco Lanuzza, Leonid Yavits

Proceedings of the ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18, 2022

2021

Gain-Cell Embedded DRAM Under Cryogenic Operation - A First Study.

Esteban Garzón, Yosi Greenblatt, Odem Harel, Marco Lanuzza, Adam Teman

IEEE Trans. Very Large Scale Integr. Syst., 2021

Hamming Distance Tolerant Content-Addressable Memory (HD-CAM) for Approximate Matching Applications.

Esteban Garzón, Roman Golman, Zuher Jahshan, Robert Hanhan, Natan Vinshtok-Melnik, Marco Lanuzza, Adam Teman, Leonid Yavits

CoRR, 2021

2020

Assessment of STT-MRAMs based on double-barrier MTJs for cache applications by means of a device-to-system level simulation framework.

Esteban Garzón, Raffaele De Rose, Felice Crupi, Lionel Trojman, Giovanni Finocchio, Mario Carpentieri, Marco Lanuzza

Integr., 2020

Reconfigurable CMOS/STT-MTJ Non-Volatile Circuit for Logic-in-Memory Applications.

Esteban Garzón, Benjamin Zambrano, Tatiana Moposita, Ramiro Taco, Luis-Miguel Prócel, Lionel Trojman

Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020

2019

Exploiting Double-Barrier MTJs for Energy-Efficient Nanoscaled STT-MRAMs.

Esteban Garzón, Raffaele De Rose, Felice Crupi, Lionel Trojman, Giovanni Finocchio, Mario Carpentieri, Marco Lanuzza

Proceedings of the 16th International Conference on Synthesis, 2019

Microprocessor Design with a Direct Bluetooth Connection in 45 nm Technology Using Microwind.

Esteban Garzón, Felix Chavez, Diego Jaramillo, Luis Sanchez, Sofia Lara, Carlos Macias, Eliana Acurio, Luis-Miguel Procel, Lionel Trojman, Etienne Sicard

Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019

Device-to-System Level Simulation Framework for STT-DMTJ Based Cache Memory.

Esteban Garzón, Raffaele De Rose, Felice Crupi, Marco Lanuzza

Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

Evaluating the Energy Efficiency of STT-MRAMs Based on Perpendicular MTJs with Double Reference Layers.

Marco Lanuzza, Raffaele De Rose, Esteban Garzón, Felice Crupi

Proceedings of the 13th IEEE International Conference on ASIC, 2019

2016

Fast computation of Cramer-Rao Bounds for TOA.

Esteban Garzón, Santiago Valdiviezo, René Játiva E., Josep Vidal

Proceedings of the IEEE Latin American Conference on Computational Intelligence, 2016