Yonatan Shoshan

Orcid: 0009-0007-7124-6437

According to our database1, Yonatan Shoshan authored at least 11 papers between 2007 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Revisiting Dynamic Logic - A True Candidate for Energy-Efficient Cryogenic Operation in Nanoscaled Technologies.
IEEE Trans. Circuits Syst. I Regul. Pap., March, 2024

HAMSA-DI: A Low-Power Dual-Issue RISC-V Core Targeting Energy-Efficient Embedded Systems.
IEEE Trans. Circuits Syst. I Regul. Pap., January, 2024

2023
On-chip fully reconfigurable Artificial Neural Network in 16 nm FinFET for Positron Emission Tomography.
CoRR, 2023

Overview of Cryogenic Operation in Nanoscale Technology Nodes.
Proceedings of the 14th IEEE Latin America Symposium on Circuits and System, 2023

2022
Evaluation of Dual Mode Logic Under Cryogenic Temperatures.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

A RISC-V-based Research Platform for Rapid Design Cycle.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2017

2013
Hardware Implementation of a Digital Watermarking System for Video Authentication.
IEEE Trans. Circuits Syst. Video Technol., 2013

2008
Hardware implementation of a DCT watermark for CMOS image sensors.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

A simplified approach for designing secure Random Number Generators in HW.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

2007
Low Power CMOS Image Sensors Employing Adaptive Bulk Biasing Control (AB2C) Approach.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007


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