Yi-Fang Chiu

According to our database1, Yi-Fang Chiu authored at least 5 papers between 2001 and 2014.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2014
Separate Clock Network Voltage for Correcting Random Errors in ULV Clocked Storage Cells.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

2011
Assessing e-learning 2.0 system success.
Comput. Educ., 2011

2007
An Efficient Approach with Scaling Capability to Improve Existing Memory Power Model.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007

2006
A Scalable Power Modeling Approach for Embedded Memory Using LIB Format.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006

2001
A high throughput 2-dimensional DCT/IDCT architecture for real-time image and video system.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001


  Loading...