Yongsoo Joo

Orcid: 0000-0001-8192-5029

According to our database1, Yongsoo Joo authored at least 20 papers between 2002 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
A Memory-Efficient Overwrite Detection Method for Ransomware-Proof SSDs.
IEICE Trans. Inf. Syst., August, 2023

2020
Enlarging I/O Size for Faster Loading of Mobile Applications.
IEEE Embed. Syst. Lett., 2020

2017
Exploiting I/O Reordering and I/O Interleaving to Improve Application Launch Performance.
ACM Trans. Storage, 2017

2015
Application Prefetcher Design Using both I/O Reordering and I/O Interleaving.
IEICE Trans. Inf. Syst., 2015

2014
Rapid Prototyping and Evaluation of Intelligence Functions of Active Storage Devices.
IEEE Trans. Computers, 2014

2013
A Hybrid PRAM and STT-RAM Cache Architecture for Extending the Lifetime of PRAM Caches.
IEEE Comput. Archit. Lett., 2013

2012
Improving Application Launch Performance on Solid State Drives.
J. Comput. Sci. Technol., 2012

2011
FAST: Quick Application Launch on Solid-State Drives.
Proceedings of the 9th USENIX Conference on File and Storage Technologies, 2011

2010
A Hybrid solid-state storage architecture for the performance, energy consumption, and lifetime improvement.
Proceedings of the 16th International Conference on High-Performance Computer Architecture (HPCA-16 2010), 2010

Energy- and endurance-aware design of phase change memory caches.
Proceedings of the Design, Automation and Test in Europe, 2010

2009
Improving application launch times with hybrid disks.
Proceedings of the 7th International Conference on Hardware/Software Codesign and System Synthesis, 2009

2008
An energy characterization platform for memory devices and energy-aware data compression for multilevel-cell flash memory.
ACM Trans. Design Autom. Electr. Syst., 2008

Energy and Performance Optimization of Demand Paging With OneNAND Flash.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

Simultaneous optimization of battery-aware voltage regulator scheduling with dynamic voltage and frequency scaling.
Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008

2007
Energy-Aware Data Compression for Multi-Level Cell (MLC) Flash Memory.
Proceedings of the 44th Design Automation Conference, 2007

2006
Demand paging for OneNAND<sup>TM</sup> Flash eXecute-in-place.
Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, 2006

2004
Web-Based Energy Exploration Tool for Embedded Systems.
IEEE Des. Test Comput., 2004

2003
Low-energy off-chip SDRAM memory systems for embedded applications.
ACM Trans. Embed. Comput. Syst., 2003

2002
Energy-Monitoring Tool for Low-Power Embedded Programs.
IEEE Des. Test Comput., 2002

Energy exploration and reduction of SDRAM memory systems.
Proceedings of the 39th Design Automation Conference, 2002


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