Yibo Chen

According to our database1, Yibo Chen authored at least 37 papers between 2008 and 2019.

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Bibliography

2019
A multi-modal health data fusion and analysis method based on body sensor network.
IJSTM, 2019

Textual Sentiment of Chinese Microblog Toward the Stock Market.
International Journal of Information Technology and Decision Making, 2019

The bilateral solver for quality estimation based multi-focus image fusion.
CoRR, 2019

Zoom-In-To-Check: Boosting Video Interpolation via Instance-Level Discrimination.
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2019

2018
Robust Multi-Focus Image Fusion Using Edge Model and Multi-Matting.
IEEE Trans. Image Processing, 2018

Realtime Time Synchronized Event-Based Stereo.
Proceedings of the Computer Vision - ECCV 2018, 2018

2017
Do we really need more training data for object localization.
Proceedings of the 2017 IEEE International Conference on Image Processing, 2017

Unsupervised segmentation of low depth of field images based on L0 regularized matting model.
Proceedings of the 2017 IEEE International Conference on Image Processing, 2017

2016
DoraPicker: An autonomous picking system for general objects.
Proceedings of the IEEE International Conference on Automation Science and Engineering, 2016

2015
A Scalable Context-Aware Objective Function (SCAOF) of Routing Protocol for Agricultural Low-Power and Lossy Networks (RPAL).
Sensors, 2015

Edge model based fusion of multi-focus images using matting method.
Proceedings of the 2015 IEEE International Conference on Image Processing, 2015

2013
Through Silicon Via Aware Design Planning for Thermally Efficient 3-D Integrated Circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2013

Extending the RPL Routing Protocol to Agricultural Low Power and Lossy Networks (A-LLNs).
IJAEIS, 2013

Shanghai Stock Exchange Composite Index Forecasting Based on Microblogging.
Proceedings of the Advances in Data Mining, 13th Industrial Conference, 2013

An If-While-If Model-Based Performance Evaluation of Ranking Metrics for Spectra-Based Fault Localization.
Proceedings of the 37th Annual IEEE Computer Software and Applications Conference, 2013

2012
Parametric Yield-Driven Resource Binding in High-Level Synthesis with Multi-Vth/Vdd Library and Device Sizing.
J. Electrical and Computer Engineering, 2012

Semantic Learning Service Personalized.
Int. J. Comput. Intell. Syst., 2012

3DHLS: Incorporating high-level synthesis in physical planning of three-dimensional (3D) ICs.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2011
Variation-Aware Task and Communication Mapping for MPSoC Architecture.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2011

Solving the Sparsity Problem in Recommender Systems Using Association Retrieval.
JCP, 2011

Ricochet Robots is Solved.
ICGA Journal, 2011

Three-dimensional Integrated Circuits: Design, EDA, and Architecture.
Foundations and Trends in Electronic Design Automation, 2011

Analysis and mitigation of lateral thermal blockage effect of through-silicon-via in 3D IC designs.
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011

Partitioning Algorithm for PON Network Design.
Proceedings of the Applied Informatics and Communication - International Conference, 2011

System-level design space exploration for three-dimensional (3D) SoCs.
Proceedings of the 9th International Conference on Hardware/Software Codesign and System Synthesis, 2011

2010
Test-access mechanism optimization for core-based three-dimensional SOCs.
Microelectronics Journal, 2010

3D-nonFAR: three-dimensional non-volatile FPGA architecture using phase change memory.
Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010

Cost-effective integration of three-dimensional (3D) ICs emphasizing testing cost analysis.
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010

A Hybrid solid-state storage architecture for the performance, energy consumption, and lifetime improvement.
Proceedings of the 16th International Conference on High-Performance Computer Architecture (HPCA-16 2010), 2010

Energy and performance driven circuit design for emerging phase-change memory.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

Parametric yield driven resource binding in behavioral synthesis with multi-Vth/Vdd library.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

Minimizing leakage power in aging-bounded high-level synthesis with design time multi-Vth assignment.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

2009
Statistical High-Level Synthesis under Process Variability.
IEEE Design & Test of Computers, 2009

Tolerating process variations in high-level synthesis using transparent latches.
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

Arithmetic unit design using 180nm TSV-based 3D stacking technology.
Proceedings of the IEEE International Conference on 3D System Integration, 2009

2008
ILP-based scheme for timing variation-aware scheduling and resource binding.
Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008

Test-Access Solutions for Three-Dimensional SOCs.
Proceedings of the 2008 IEEE International Test Conference, 2008


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