Yuichi Miyahara

According to our database, Yuichi Miyahara authored at least 5 papers between 2013 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2023

A Rail-to-Rail 12 MS/s 91.3 dB SNDR 94.1 dB DR Two-Step SAR ADC With Integrated Input Buffer Using Predictive Level-Shifting.

Manxin Li, Calvin Yoji Lee, Praveen Kumar Venkatachala, Ahmed ElShater, Yuichi Miyahara, Kazuki Sobue, Koji Tomioka, Un-Ku Moon

IEEE J. Solid State Circuits, December, 2023

A Rail-to-Rail 12MS 91.3dB SNDR 94.1dB DR Two-Step SAR ADC with Integrated Input Buffer Using Predictive Level-Shifting.

Manxin Li, Calvin Yoji Lee, Ahmed ElShater, Yuichi Miyahara, Kazuki Sobue, Koji Tomioka, Un-Ku Moon

Proceedings of the IEEE International Solid- State Circuits Conference, 2023

2020

A 16b 1.62MS/s Calibration-free SAR ADC with 86.6dB SNDR utilizing DAC Mismatch Cancellation Based on Symmetry.

Shota Konno, Yuichi Miyahara, Kazuki Sobue, Koichi Hamashita

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2020

2014

A 14b 60 MS/s Pipelined ADC Adaptively Cancelling Opamp Gain and Nonlinearity.

Yuichi Miyahara, Mitsuhiro Sano, Kazuo Koyama, Toshikazu Suzuki, Koichi Hamashita, Bang-Sup Song

IEEE J. Solid State Circuits, 2014

2013

Adaptive cancellation of gain and nonlinearity errors in pipelined ADCs.

Yuichi Miyahara, Mitsuhiro Sano, Kazuo Koyama, Toshikazu Suzuki, Koichi Hamashita, Bang-Sup Song

Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013