# Praveen Kumar Venkatachala

According to our database

Collaborative distances:

^{1}, Praveen Kumar Venkatachala authored at least 19 papers between 2016 and 2021.Collaborative distances:

## Timeline

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#### On csauthors.net:

## Bibliography

2021

A Pseudo-Pseudo-Differential ADC Achieving 105dB SNDR in 10kHz Bandwidth Using Ring Amplifier Based Integrators.

IEEE Trans. Circuits Syst. II Express Briefs, 2021

2020

A Charge-Domain Switched-G<sub>m</sub>-C Band-Pass Filter Using Interleaved Semi-Passive Charge-Sharing Technique.

IEEE Trans. Circuits Syst. I Regul. Pap., 2020

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019

A 10-mW 16-b 15-MS/s Two-Step SAR ADC With 95-dB DR Using Dual-Deadzone Ring Amplifier.

IEEE J. Solid State Circuits, 2019

A 10mW 16b 15MS/s Two-Step SAR ADC with 95dB DR Using Dual-Deadzone Ring-Amplifier.

Proceedings of the IEEE International Solid- State Circuits Conference, 2019

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Application of Ring-Amplifiers for Low-Power Wide-Bandwidth Digital Subsampling ADC-PLL.

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

An 80mA Capacitor-Less LDO with 6.5µA Quiescent Current and No Frequency Compensation Using Adaptive-Deadzone Ring Amplifier.

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019

2018

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Passive Compensation for Improved Settling and Large Signal Stabilization of Ring Amplifiers.

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

An Empirical Study of the Settling Performance of Ring Amplifiers for Pipelined ADCs.

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Voltage domain correction technique for timing skew errors in time interleaved ADCs.

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

A 74.33 dB SNDR 20 MSPS 2.74 mW pipelined ADC using a dynamic deadzone ring amplifier.

Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

2016

A 0.6mW 31MHz 4<sup>th</sup>-order low-pass filter with +29dBm IIP3 using self-coupled source follower based biquads in 0.18µm CMOS.

Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016