Yusuke Asada

According to our database, Yusuke Asada authored at least 3 papers between 2010 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2019

Innovative Test Practices in Japan.

Yusuke Asada, Takahiko Shimizu, Yuji Gendai, Keno Sato, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa, Jiang-Lin Wei, Nene Kushita, Hirotaka Arai, Anna Kuwana, Takayuki Nakatani, Kazumi Hatayama, Haruo Kobayashi

Proceedings of the 37th IEEE VLSI Test Symposium, 2019

2013

A 6 bit, 7 mW, 700 MS/s Subranging ADC Using CDAC and Gate-Weighted Interpolation.

Hyunui Lee, Yusuke Asada, Masaya Miyahara, Akira Matsuzawa

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013

2010

An 8-Bit 600-MSps Flash ADC Using Interpolating and Background Self-Calibrating Techniques.

Daehwa Paik, Yusuke Asada, Masaya Miyahara, Akira Matsuzawa

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010