Yusuke Niki

According to our database1, Yusuke Niki authored at least 7 papers between 2010 and 2014.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2014
A 27% Active and 85% Standby Power Reduction in Dual-Power-Supply SRAM Using BL Power Calculator and Digitally Controllable Retention Circuit.
IEEE J. Solid State Circuits, 2014

2013
A supply-noise-rejection technique in ADPLL with noise-cancelling current source.
Proceedings of the ESSCIRC 2013, 2013

2012
A 47% access time reduction with a worst-case timing-generation scheme utilizing a statistical method for ultra low voltage SRAMs.
Proceedings of the Symposium on VLSI Circuits, 2012

Energy efficiency deterioration by variability in SRAM and circuit techniques for energy saving without voltage reduction.
Proceedings of the IEEE International Conference on IC Design & Technology, 2012

2011
A Digitized Replica Bitline Delay Technique for Random-Variation-Tolerant Timing Generation of SRAM Sense Amplifiers.
IEEE J. Solid State Circuits, 2011

A trimless, 0.5V-1.0V wide voltage operation, high density SRAM macro utilizing dynamic cell stability monitor and multiple memory cell access.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011

2010
A configurable SRAM with constant-negative-level write buffer for low-voltage operation with 0.149µm<sup>2</sup> cell in 32nm high-k metal-gate CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010


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