Zhou Wang

Orcid: 0000-0002-0203-6854

Affiliations:
  • University of Chinese Academy of Sciences, Institute of Microelectronics of Chinese Academy of Sciences,China


According to our database1, Zhou Wang authored at least 16 papers between 2018 and 2025.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

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Bibliography

2025
Learning in Log-Domain: Subthreshold Analog AI Accelerator Based on Stochastic Gradient Descent.
CoRR, January, 2025

GPE: A High-Performance Edge GNN Inference Processor with Multi-Parallelism Format-Variation Mechanism.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

Architectural Exploration of Hybrid Neural Decoders for Neuromorphic Implantable BMI.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

STPE: An Energy-Efficient Edge-Device Transformer Inference Processor with Multi-Mode Data-Compression Scheme.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

2024
Distributed Spatially Non-Stationary Channel Estimation for Extremely-Large Antenna Systems.
EAI Endorsed Trans. Ind. Networks Intell. Syst., 2024

A Low-Complexity Constructive Interference Exploitation Scheme in IRS-NOMA Systems.
Proceedings of the 24th IEEE International Conference on Communication Technology, 2024

GRS: A General RISC-V SIMD Vector Acceleration Processor for Artificial Intelligence Applications.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2024

SSPE: A Device-edge SNN Inference Artificial Intelligence Processor in Supporting Smart Computing.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2024

RCPE: An Excellent Performance Training Processor with RISC-V based Compression Mechanism.
Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024

RTPE: A High Energy Efficiency Inference Processor with RISC-V based Transformation Mechanism.
Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024

2023
CPE: An Energy-Efficient Edge-Device Training with Multi-dimensional Compression Mechanism.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

TPE: A High-Performance Edge-Device Inference with Multi-level Transformational Mechanism.
Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023

2019
Improved Weighted Least Square Phase Estimation for OFDM-Based WLANs.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2019

Simplified pilot-aided weighted least square phase estimation method for OFDM-based WLANs.
IEICE Electron. Express, 2019

An improved implementation of sum-product algorithm for LDPC decoder.
IEICE Electron. Express, 2019

2018
FPGA and ASIC implementation of reliable and effective architecture for a LTE downlink transmitter.
IEICE Electron. Express, 2018


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