Abhishek Mukherjee

According to our database, Abhishek Mukherjee authored at least 17 papers between 2017 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

Digital hypertension management: clinical and cost outcomes of a pilot implementation of the OMRON hypertension management platform.

Ericka Holmstrand, Hironori Sato, Jim Li, Abhishek Mukherjee, Nicole Fitzpatrick, Kenneth R. Rayl, Francis R. Colangelo

Frontiers Digit. Health, March, 2023

2022

A 0.37mm² 250kHz-BW 95dB-SNDR CTDSM with Low-Cost 2^nd-order Vector-Quantizer DEM.

Wei Shi, Xing Wang, Xiyuan Tang, Abhishek Mukherjee, Raviteja Theertham, Shanthi Pavan, Lu Jie, Nan Sun

Proceedings of the IEEE Custom Integrated Circuits Conference, 2022

2021

Modelling cancer mechanics across multiple length scales: from basic understanding to applications.

Abhishek Mukherjee

PhD thesis, 2021

A 74.5-dB Dynamic Range 10-MHz BW CT-ΔΣ ADC With Distributed-Input VCO and Embedded Capacitive-π Network in 40-nm CMOS.

Abhishek Mukherjee, Miguel Gandara, Xiangxing Yang, Linxiao Shen, Xiyuan Tang, Chen-Kai Hsu, Nan Sun

IEEE J. Solid State Circuits, 2021

A 77.1-dB-SNDR 6.25-MHz-BW Pipeline SAR ADC With Enhanced Interstage Gain Error Shaping and Quantization Noise Shaping.

Chen-Kai Hsu, Xiyuan Tang, Jiaxin Liu, Rui Xu, Wenda Zhao, Abhishek Mukherjee, Timothy R. Andeen, Nan Sun

IEEE J. Solid State Circuits, 2021

10.4 A 3.7mW 12.5MHz 81dB-SNDR 4th-Order CTDSM with Single-OTA and 2nd-Order NS-SAR.

Wei Shi, Jiaxin Liu, Abhishek Mukherjee, Xiangxing Yang, Xiyuan Tang, Linxiao Shen, Wenda Zhao, Nan Sun

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

MAGICAL 1.0: An Open-Source Fully-Automated AMS Layout Synthesis Framework Verified With a 40-nm 1GS/s Δ∑ ADC.

Hao Chen, Mingjie Liu, Xiyuan Tang, Keren Zhu, Abhishek Mukherjee, Nan Sun, David Z. Pan

Proceedings of the IEEE Custom Integrated Circuits Conference, 2021

2020

Nuclear plasticity increases susceptibility to damage during confined migration.

Abhishek Mukherjee, Amlan Barai, Ramesh Kumar Singh, Wenyi Yan, Shamik Sen

PLoS Comput. Biol., 2020

A 13.5-ENOB, 107-μW Noise-Shaping SAR ADC With PVT-Robust Closed-Loop Dynamic Amplifier.

Xiyuan Tang, Xiangxing Yang, Wenda Zhao, Chen-Kai Hsu, Jiaxin Liu, Linxiao Shen, Abhishek Mukherjee, Wei Shi, Shaolan Li, David Z. Pan, Nan Sun

IEEE J. Solid State Circuits, 2020

An Energy-Efficient Comparator With Dynamic Floating Inverter Amplifier.

Xiyuan Tang, Linxiao Shen, Begum Kasap, Xiangxing Yang, Wei Shi, Abhishek Mukherjee, David Z. Pan, Nan Sun

IEEE J. Solid State Circuits, 2020

A SAR ADC with Reduced kT/C Noise by Decoupling Noise PSD and BW.

Zhelu Li, Arnab Dutta, Abhishek Mukherjee, Xiyuan Tang, Linxiao Shen, Lenian He, Nan Sun

Proceedings of the IEEE Symposium on VLSI Circuits, 2020

9.5 A 13.5b-ENOB Second-Order Noise-Shaping SAR with PVT-Robust Closed-Loop Dynamic Amplifier.

Xiyuan Tang, Xiangxing Yang, Wenda Zhao, Chen-Kai Hsu, Jiaxin Liu, Linxiao Shen, Abhishek Mukherjee, Wei Shi, David Z. Pan, Nan Sun

Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

A 77.1-dB 6.25-MHz-BW Pipeline SAR ADC with Enhanced Interstage Gain Error Shaping and Quantization Error Shaping.

Chen-Kai Hsu, Xiyuan Tang, Wenda Zhao, Rui Xu, Abhishek Mukherjee, Timothy R. Andeen, Nan Sun

Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020

2019

A 0.6-V Tail-Less Inverter Stacking Amplifier with 0.96 PEF.

Linxiao Shen, Abhishek Mukherjee, Shaolan Li, Xiyuan Tang, Nanshu Lu, Nan Sun

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

A 0.01mm² 25µW 2MS/s 74dB-SNDR Continuous-Time Pipelined-SAR ADC with 120fF Input Capacitor.

Linxiao Shen, Yi Shen, Xiyuan Tang, Chen-Kai Hsu, Wei Shi, Shaolan Li, Wenda Zhao, Abhishek Mukherjee, Nan Sun

Proceedings of the IEEE International Solid- State Circuits Conference, 2019

Enhanced Homomorphic Encryption Scheme with Particle Swarm Optimization for Encryption of Cloud Data.

Abhishek Mukherjee, Dhananjay Bisen, Praneet Saurabh, Lalit Kane

Proceedings of the Hybrid Intelligent Systems, 2019

2017

A 174.3-dB FoM VCO-Based CT ΔΣ Modulator With a Fully-Digital Phase Extended Quantizer and Tri-Level Resistor DAC in 130-nm CMOS.

Shaolan Li, Abhishek Mukherjee, Nan Sun

IEEE J. Solid State Circuits, 2017