Adarsha Balaji
Orcid: 0000-0002-3535-8788
According to our database1,
Adarsha Balaji
authored at least 23 papers
between 2018 and 2024.
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Bibliography
2024
2023
IEEE Trans. Emerg. Top. Comput., 2023
Proceedings of the International Conference on Machine Learning and Applications, 2023
2022
ACM Trans. Embed. Comput. Syst., November, 2022
DFSynthesizer: Dataflow-based Synthesis of Spiking Neural Networks to Neuromorphic Hardware.
ACM Trans. Embed. Comput. Syst., 2022
CoRR, 2022
Design of Many-Core Big Little µBrains for Energy-Efficient Embedded Neuromorphic Computing.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
2021
ACM J. Emerg. Technol. Comput. Syst., 2021
Enabling Resource-Aware Mapping of Spiking Neural Networks via Spatial Decomposition.
IEEE Embed. Syst. Lett., 2021
Design of Many-Core Big Little μBrain for Energy-Efficient Embedded Neuromorphic Computing.
CoRR, 2021
NeuroXplorer 1.0: An Extensible Framework for Architectural Exploration with Spiking Neural Networks.
Proceedings of the ICONS 2021: International Conference on Neuromorphic Systems 2021, 2021
Proceedings of the CF '21: Computing Frontiers Conference, 2021
2020
J. Signal Process. Syst., 2020
IEEE Trans. Very Large Scale Integr. Syst., 2020
Proceedings of the 21st ACM SIGPLAN/SIGBED International Conference on Languages, 2020
PyCARL: A PyNN Interface for Hardware-Software Co-Simulation of Spiking Neural Network.
Proceedings of the 2020 International Joint Conference on Neural Networks, 2020
Proceedings of the 11th International Green and Sustainable Computing Workshops, 2020
2019
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
A Framework to Explore Workload-Specific Performance and Lifetime Trade-offs in Neuromorphic Computing.
IEEE Comput. Archit. Lett., 2019
A Framework for the Analysis of Throughput-Constraints of SNNs on Neuromorphic Hardware.
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019
Exploration of Segmented Bus As Scalable Global Interconnect for Neuromorphic Computing.
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019
2018
J. Low Power Electron., 2018