Salim Ullah

According to our database, Salim Ullah authored at least 31 papers between 2018 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2023

NvMISC: Toward an FPGA-Based Emulation Platform for RISC-V and Nonvolatile Memories.

Yuankang Zhao, Salim Ullah, Siva Satyendra Sahoo, Akash Kumar

IEEE Embed. Syst. Lett., December, 2023

High-Flexibility Designs of Quantized Runtime Reconfigurable Multi-Precision Multipliers.

Yuhao Liu, Shubham Rai, Salim Ullah, Akash Kumar

IEEE Embed. Syst. Lett., December, 2023

<i>AxOTreeS</i>: A Tree Search Approach to Synthesizing FPGA-based Approximate Operators.

Siva Satyendra Sahoo, Salim Ullah, Akash Kumar

ACM Trans. Embed. Comput. Syst., October, 2023

AxOMaP: Designing FPGA-based Approximate Arithmetic Operators using Mathematical Programming.

Siva Satyendra Sahoo, Salim Ullah, Akash Kumar

CoRR, 2023

AxOCS: Scaling FPGA-based Approximate Operators using Configuration Supersampling.

Siva Satyendra Sahoo, Salim Ullah, Soumyo Bhattacharjee, Akash Kumar

CoRR, 2023

NetPU-M: a Generic Reconfigurable Neural Network Accelerator Architecture for MLPs.

Yuhao Liu, Shubham Rai, Salim Ullah, Akash Kumar

Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2023

CoOAx: Correlation-aware Synthesis of FPGA-based Approximate Operators.

Salim Ullah, Siva Satyendra Sahoo, Akash Kumar

Proceedings of the Great Lakes Symposium on VLSI 2023, 2023

SyFAxO-GeN: Synthesizing FPGA-Based Approximate Operators with Generative Networks.

Rohit Ranjan, Salim Ullah, Siva Satyendra Sahoo, Akash Kumar

Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

2022

Design, Analysis, and Applications of Approximate Arithmetic Modules.

Salim Ullah

PhD thesis, 2022

<i>AppAxO</i>: Designing Application-specific Approximate Operators for FPGA-based Embedded Systems.

Salim Ullah, Siva Satyendra Sahoo, Nemath Ahmed, Debabrata Chaudhury, Akash Kumar

ACM Trans. Embed. Comput. Syst., 2022

High-Performance Accurate and Approximate Multipliers for FPGA-Based Hardware Accelerators.

Salim Ullah, Semeen Rehman, Muhammad Shafique, Akash Kumar

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

NetPU: Prototyping a Generic Reconfigurable Neural Network Accelerator Architecture.

Yuhao Liu, Shubham Rai, Salim Ullah, Akash Kumar

Proceedings of the International Conference on Field-Programmable Technology, 2022

ERMES: Efficient Racetrack Memory Emulation System based on FPGA.

Fanny Spagnolo, Salim Ullah, Pasquale Corsonello, Akash Kumar

Proceedings of the 32nd International Conference on Field-Programmable Logic and Applications, 2022

PosAx-O: Exploring Operator-level Approximations for Posit Arithmetic in Embedded AI/ML.

Amritha Immaneni, Salim Ullah, Suresh Nambi, Siva Satyendra Sahoo, Akash Kumar

Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

Multi-Precision Deep Neural Network Acceleration on FPGAs.

Negar Neda, Salim Ullah, Azam Ghanbari, Hoda Mahdiani, Mehdi Modarressi, Akash Kumar

Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

2021

ReLAccS: A Multilevel Approach to Accelerator Design for Reinforcement Learning on FPGA-Based Systems.

Akhil Raj Baranwal, Salim Ullah, Siva Satyendra Sahoo, Akash Kumar

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Area-Optimized Accurate and Approximate Softcore Signed Multiplier Architectures.

Salim Ullah, Hendrik Schmidl, Siva Satyendra Sahoo, Semeen Rehman, Akash Kumar

IEEE Trans. Computers, 2021

Energy-Efficient Low-Latency Signed Multiplier for FPGA-Based Hardware Accelerators.

Salim Ullah, Tuan Duy Anh Nguyen, Akash Kumar

IEEE Embed. Syst. Lett., 2021

ExPAN(N)D: Exploring Posits for Efficient Artificial Neural Network Design in FPGA-Based Systems.

Suresh Nambi, Salim Ullah, Siva Satyendra Sahoo, Aditya Lohana, Farhad Merchant, Akash Kumar

IEEE Access, 2021

<i>MemOReL</i>: A Memory-oriented Optimization Approach to Reinforcement Learning on FPGA-based Embedded Systems.

Siva Satyendra Sahoo, Akhil Raj Baranwal, Salim Ullah, Akash Kumar

Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021

CLAppED: A Design Framework for Implementing Cross-Layer Approximation in FPGA-based Embedded Systems.

Salim Ullah, Siva Satyendra Sahoo, Akash Kumar

Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020

ALigN: A Highly Accurate Adaptive Layerwise Log_2_Lead Quantization of Pre-Trained Neural Networks.

Siddharth Gupta, Salim Ullah, Kapil Ahuja, Aruna Tiwari, Akash Kumar

IEEE Access, 2020

An Approximate Binary Classifier for Data Integrity Assessment in IoT Sensors.

Arlene John, Salim Ullah, Akash Kumar, Barry Cardiff, Deepu John

Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020

SIMDive: Approximate SIMD Soft Multiplier-Divider for FPGAs with Tunable Accuracy.

Zahra Ebrahimi, Salim Ullah, Akash Kumar

Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

L2L: A Highly Accurate Log_2_Lead Quantization of Pre-trained Neural Networks.

Salim Ullah, Siddharth Gupta, Kapil Ahuja, Aruna Tiwari, Akash Kumar

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

LeAp: Leading-one Detection-based Softcore Approximate Multipliers with Tunable Accuracy.

Zahra Ebrahimi, Salim Ullah, Akash Kumar

Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2019

Design Methodology for Embedded Approximate Artificial Neural Networks.

Adarsha Balaji, Salim Ullah, Anup Das, Akash Kumar

Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

A Comparative Analysis of Neural Networks and Enhancement of ELM for Short Term Load Forecasting.

Rahim Ullah, Nadeem Javaid, Ghulam Hafeez, Salim Ullah, Fahad Ahmad, Ashraf Ullah

Proceedings of the Complex, Intelligent, and Software Intensive Systems, 2019

2018

DeMAS: An efficient design methodology for building approximate adders for FPGA-based systems.

Bharath Srinivas Prabakaran, Semeen Rehman, Muhammad Abdullah Hanif, Salim Ullah, Ghazal Mazaheri, Akash Kumar, Muhammad Shafique

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Area-optimized low-latency approximate multipliers for FPGA-based hardware accelerators.

Salim Ullah, Semeen Rehman, Bharath Srinivas Prabakaran, Florian Kriebel, Muhammad Abdullah Hanif, Muhammad Shafique, Akash Kumar

Proceedings of the 55th Annual Design Automation Conference, 2018

<i>SMApproxlib</i>: library of FPGA-based approximate multipliers.

Salim Ullah, Sanjeev Sripadraj Murthy, Akash Kumar

Proceedings of the 55th Annual Design Automation Conference, 2018