Alexander Edward
Orcid: 0000-0003-3563-0320
According to our database1,
Alexander Edward
authored at least 11 papers
between 2012 and 2018.
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Bibliography
2018
A Continuous-Time MASH 1-1-1 Delta-Sigma Modulator With FIR DAC and Encoder-Embedded Loop-Unrolling Quantizer in 40-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst., 2018
IEEE J. Solid State Circuits, 2018
2017
A Low-Power Digitizer for Back-Illuminated 3-D-Stacked CMOS Image Sensor Readout With Passing Window and Double Auto-Zeroing Techniques.
IEEE J. Solid State Circuits, 2017
A 43-mW MASH 2-2 CT ΣΔ Modulator Attaining 74.4/75.8/76.8 dB of SNDR/SNR/DR and 50 MHz of BW in 40-nm CMOS.
IEEE J. Solid State Circuits, 2017
A 75-MHz Continuous-Time Sigma-Delta Modulator Employing a Broadband Low-Power Highly Efficient Common-Gate Summing Stage.
IEEE J. Solid State Circuits, 2017
High-performance continuous-time MASH sigma-delta ADCs for broadband wireless applications.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
2016
A 4 Bit Continuous-Time ΣΔ Modulator With Fully Digital Quantization Noise Reduction Algorithm Employing a 7 Bit Quantizer.
IEEE J. Solid State Circuits, 2016
2015
A 75 MHz BW 68dB DR CT-ΣΔ modulator with single amplifier biquad filter and a broadband low-power common-gate summing technique.
Proceedings of the Symposium on VLSI Circuits, 2015
2014
General Analysis of Feedback DAC's Clock Jitter in Continuous-Time Sigma-Delta Modulators.
IEEE Trans. Circuits Syst. II Express Briefs, 2014
2012
An Ultra-Low Voltage Analog Front End for Strain Gauge Sensory System Application in 0.18 µm CMOS.
IEICE Trans. Electron., 2012