Suraj Prakash

Orcid: 0000-0002-5585-9459

According to our database1, Suraj Prakash authored at least 10 papers between 2007 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
The Anatomy of an Infrastructure for Digital Underground Mining.
Proceedings of the 8th International Conference on Internet of Things, 2023

2020
A 12-Bit 125-MS/s 2.5-Bit/Cycle SAR-Based Pipeline ADC Employing a Self-Biased Gain Boosting Amplifier.
IEEE Trans. Circuits Syst., 2020

2019
A 27.7 fJ/conv-step 500 MS/s 12-Bit Pipelined ADC Employing a Sub-ADC Forecasting Technique and Low-Power Class AB Slew Boosted Amplifiers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

2018
Event-Driven Control With Deadline Optimization for Linear Systems With Stochastic Delays.
IEEE Trans. Control. Netw. Syst., 2018

Operational Transconductance Amplifier With Class-B Slew-Rate Boosting for Fast High-Performance Switched-Capacitor Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

A 44-fJ/Conversion Step 200-MS/s Pipeline ADC Employing Current-Mode MDACs.
IEEE J. Solid State Circuits, 2018

2017
A 13bit 200MS/S pipeline ADC with current-mode MDACs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Self-triggered and event-driven control for linear systems with stochastic delays.
Proceedings of the 2017 American Control Conference, 2017

2013
Envelope tracking technique with bang-bang slew-rate enhancer for linear wideband RF PAs.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

2007
A Time Series Approach for Identification of Exons and Introns.
Proceedings of the 10th International Conference on Information Technology, 2007


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