Alexey Glebov

According to our database, Alexey Glebov authored at least 10 papers between 1995 and 2009.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of three.

2009

Calculation of stress probability for NBTI-aware timing analysis.

Alexander L. Stempkovsky, Alexey Glebov, Sergey Gavrilov

Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

2004

Delay noise pessimism reduction by logic correlations.

Alexey Glebov, Sergey Gavrilov, R. Soloviev, Vladimir Zolotov, Murat R. Becer, Chanhee Oh, Rajendran Panda

Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

False-Noise Analysis for Domino Circuits.

Alexey Glebov, Sergey Gavrilov, Vladimir Zolotov, Chanhee Oh, Rajendran Panda, Murat R. Becer

Proceedings of the 2004 Design, 2004

2003

SOI Transistor Model for Fast Transient Simulation.

D. Nadezhin, Sergey Gavrilov, Alexey Glebov, Y. Egorov, Vladimir Zolotov, David T. Blaauw, Rajendran Panda, Murat R. Becer, Alexandre Ardelea, A. Patel

Proceedings of the 2003 International Conference on Computer-Aided Design, 2003

2002

False-noise analysis using logic implications.

Alexey Glebov, Sergey Gavrilov, David T. Blaauw, Vladimir Zolotov

ACM Trans. Design Autom. Electr. Syst., 2002

False-Noise Analysis Using Resolution Method.

Alexey Glebov, Sergey Gavrilov, David T. Blaauw, Vladimir Zolotov, Rajendran Panda, Chanhee Oh

Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002

2001

False-Noise Analysis using Logic Implications.

Alexey Glebov, Sergey Gavrilov, David T. Blaauw, Supamas Sirichotiyakul, Chanhee Oh, Vladimir Zolotov

Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

1997

Library-less synthesis for static CMOS combinational logic circuits.

Sergey Gavrilov, Alexey Glebov, Satyamurthy Pullela, S. C. Moore, Abhijit Dharchoudhury, Rajendran Panda, Gopalakrishnan Vijayan, David T. Blaauw

Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

Fast power loss calculation for digital static CMOS circuits.

Sergey Gavrilov, Alexey Glebov, S. Rusakov, David T. Blaauw, Larry G. Jones, Gopalakrishnan Vijayan

Proceedings of the European Design and Test Conference, 1997

1995

Transistor reordering for low power CMOS gates using an SP-BDD representation.

Alexey Glebov, David T. Blaauw, Larry G. Jones

Proceedings of the 1995 International Symposium on Low Power Design 1995, 1995