Murat R. Becer

According to our database1, Murat R. Becer authored at least 22 papers between 1998 and 2008.

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Bibliography

2008
Coupling Noise.
Proceedings of the Handbook of Algorithms for Physical Design Automation., 2008

Transistor level gate modeling for accurate and fast timing, noise, and power analysis.
Proceedings of the 45th Design Automation Conference, 2008

2007
Victim alignment in crosstalk aware timing analysis.
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

Top-k Aggressors Sets in Delay Noise Analysis.
Proceedings of the 44th Design Automation Conference, 2007

2005
Pessimism reduction in crosstalk noise aware STA.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

2004
Crosstalk noise control in an SoC physical design flow.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

Postroute gate sizing for crosstalk noise reduction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

Delay noise pessimism reduction by logic correlations.
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

False-Noise Analysis for Domino Circuits.
Proceedings of the 2004 Design, 2004

2003
Crosstalk Noise in Deep Submicron Integrated Circuit Design
PhD thesis, 2003

Early probabilistic noise estimation for capacitively coupled interconnects.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003

Static Electromigration Analysis for Signal Interconnects.
Proceedings of the 4th International Symposium on Quality of Electronic Design (ISQED 2003), 2003

Post-Route Gate Sizing for Crosstalk Noise Reduction.
Proceedings of the 4th International Symposium on Quality of Electronic Design (ISQED 2003), 2003

Signal integrity management in an SoC physical design flow.
Proceedings of the 2003 International Symposium on Physical Design, 2003

SOI Transistor Model for Fast Transient Simulation.
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003

2002
Pre-route Noise Estimation in Deep Submicron Integrated Circuits.
Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002

Noise propagation and failure criteria for VLSI designs.
Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

Analysis of Noise Avoidance Techniques in DSM Interconnects Using a Complete Crosstalk Noise Model .
Proceedings of the 2002 Design, 2002

2001
A Global Driver Sizing Tool for Functional Crosstalk Noise Avoidance.
Proceedings of the 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 2001

2000
An Analytical Model for Delay and Crosstalk Estimation with Application to Decoupling.
Proceedings of the 1st International Symposium on Quality of Electronic Design (ISQED 2000), 2000

An analytical model for delay and crosstalk estimation in interconnects under general switching conditions.
Proceedings of the 2000 7th IEEE International Conference on Electronics, 2000

1998
Incorporating MOS Transistor Mismatches into Training of Analog Neural Networks.
Proceedings of the International ICSC / IFAC Symposium on Neural Computation (NC 1998), 1998


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