Andreas Becher

Orcid: 0000-0003-2750-7349

According to our database¹, Andreas Becher authored at least 31 papers between 2014 and 2022.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of four.

Timeline

Legend:

Book

In proceedings

Article

PhD thesis

Dataset

Other

Bibliography

2022

Near-Data Query Processing on Heterogeneous FPGA-based Systems.

[BibT_eX]

[DOI]

Andreas Becher

PhD thesis, 2022

Design and Evaluation of a Tunable PUF Architecture for FPGAs.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., 2022

Design and error analysis of accuracy-configurable sequential multipliers via segmented carry chains.

[BibT_eX]

[DOI]

it Inf. Technol., 2022

Real-Time Waveform Matching with a Digitizer at 10 GS/s.

[BibT_eX]

[DOI]

Proceedings of the 32nd International Conference on Field-Programmable Logic and Applications, 2022

Raw Filtering of JSON Data on FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

Putting IMT to the Test: Revisiting and Expanding Interval Matching Techniques and their Calibration for SCA.

[BibT_eX]

[DOI]

Proceedings of the 2022 Workshop on Attacks and Solutions in Hardware Security, 2022

Using Look Up Table Content as Signatures to Identify IP Cores in Modern FPGAs.

[BibT_eX]

[DOI]

Ali Asghar

Amanda Katherine Robillard

Ilya Tuzov

Andreas Becher

Daniel Ziener

Proceedings of the Architecture of Computing Systems - 35th International Conference, 2022

2021

Speculative Dynamic Reconfiguration and Table Prefetching Using Query Look-Ahead in the ReProVide Near-Data-Processing System.

[BibT_eX]

[DOI]

Lekshmi Beena Gopalakrishnan Nair

Datenbank-Spektrum, 2021

On the Approximation of Accuracy-configurable Sequential Multipliers via Segmented Carry Chains.

[BibT_eX]

[DOI]

CoRR, 2021

Choice - A Tunable PUF-Design for FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

2020

The ReProVide Query-Sequence Optimization in a Hardware-Accelerated DBMS.

[BibT_eX]

[DOI]

Lekshmi B. G.

Andreas Becher

Klaus Meyer-Wegener

CoRR, 2020

Query-Sequence Optimization on a Reconfigurable Hardware-Accelerated System.

[BibT_eX]

[DOI]

Lekshmi B. G.

Andreas Becher

Klaus Meyer-Wegener

CoRR, 2020

Secure Boot from Non-Volatile Memory for Programmable SoC Architectures.

[BibT_eX]

[DOI]

Proceedings of the 2020 IEEE International Symposium on Hardware Oriented Security and Trust, 2020

SQL Query Processing Using an Integrated FPGA-based Near-Data Accelerator in ReProVide.

[BibT_eX]

[DOI]

Proceedings of the 23rd International Conference on Extending Database Technology, 2020

The ReProVide query-sequence optimization in a hardware-accelerated DBMS.

[BibT_eX]

[DOI]

Lekshmi Beena Gopalakrishnan Nair

Andreas Becher

Klaus Meyer-Wegener

Proceedings of the 16th International Workshop on Data Management on New Hardware, 2020

2019

Compiler-Based High-Level Synthesis of Application-Specific Processors on FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 2019 International Conference on ReConFigurable Computing and FPGAs, 2019

In situ Statistics Generation within partially reconfigurable Hardware Accelerators for Query Processing.

[BibT_eX]

[DOI]

Andreas Becher

Jürgen Teich

Proceedings of the 15th International Workshop on Data Management on New Hardware, 2019

ReProVide: Towards Utilizing Heterogeneous Partially Reconfigurable Architectures for Near-Memory Data Processing.

[BibT_eX]

[DOI]

Proceedings of the Datenbanksysteme für Business, 2019

2018

Integration of FPGAs in Database Management Systems: Challenges and Opportunities.

[BibT_eX]

[DOI]

Datenbank-Spektrum, 2018

Model-Based Design Automation of Hardware/Software Co-Designs for Xilinx Zynq PSoCs.

[BibT_eX]

[DOI]

Proceedings of the 2018 International Conference on ReConFigurable Computing and FPGAs, 2018

Can Approximate Computing Reduce Power Consumption on FPGAs?

[BibT_eX]

[DOI]

Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

Optimistic regular expression matching on FPGAs for near-data processing.

[BibT_eX]

[DOI]

Andreas Becher

Stefan Wildermann

Jürgen Teich

Proceedings of the 14th International Workshop on Data Management on New Hardware, 2018

2017

Self-Adaptive FPGA-Based Image Processing Filters Using Approximate Arithmetics.

[BibT_eX]

[DOI]

Proceedings of the 20th International Workshop on Software and Compilers for Embedded Systems, 2017

2016

FPGA-Based Dynamically Reconfigurable SQL Query Processing.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., 2016

ReOrder: Runtime datapath generation for high-throughput multi-stream processing.

[BibT_eX]

[DOI]

Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2016

Hybrid energy-aware reconfiguration management on Xilinx Zynq SoCs.

[BibT_eX]

[DOI]

Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2016

FAU: Fast and error-optimized approximate adder units on LUT-Based FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 2016 International Conference on Field-Programmable Technology, 2016

A LUT-Based Approximate Adder.

[BibT_eX]

[DOI]

Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016

2015

A co-design approach for accelerated SQL query processing via FPGA-based data filtering.

[BibT_eX]

[DOI]

Proceedings of the 2015 International Conference on Field Programmable Technology, 2015

Reliability of space-grade vs. COTS SRAM-based FPGA in N-modular redundancy.

[BibT_eX]

[DOI]

Proceedings of the 2015 NASA/ESA Conference on Adaptive Hardware and Systems, 2015

2014

Energy-aware SQL query acceleration through FPGA-based dynamic partial reconfiguration.

[BibT_eX]

[DOI]

Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

Andreas Becher

Timeline

Legend:

Links

Online presence:

On csauthors.net:

Bibliography

Loading...