Jorge Echavarria

According to our database, Jorge Echavarria authored at least 16 papers between 2014 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2022

On the Approximation of Arithmetic Functions and Logic Synthesis of Approximate Very Large Boolean Networks.

Jorge Alfonso Echavarria Gutiérrez

PhD thesis, 2022

Design and error analysis of accuracy-configurable sequential multipliers via segmented carry chains.

Jorge Echavarria, Stefan Wildermann, Oliver Keszöcze, Faramarz Khosravi, Andreas Becher, Jürgen Teich

it Inf. Technol., 2022

2021

IP-cores watermarking scheme at behavioral level using genetic algorithms.

Jorge Echavarria, Alicia Morales-Reyes, René Cumplido, Miguel A. Salido, Claudia Feregrino Uribe

Eng. Appl. Artif. Intell., 2021

On the Approximation of Accuracy-configurable Sequential Multipliers via Segmented Carry Chains.

Jorge Echavarria, Stefan Wildermann, Oliver Keszöcze, Faramarz Khosravi, Andreas Becher, Jürgen Teich

CoRR, 2021

Design Space Exploration of Approximation-Based Quadruple Modular Redundancy Circuits.

Marcello Traiola, Jorge Echavarria, Alberto Bosio, Jürgen Teich, Ian O'Connor

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

Emerging Computing Devices: Challenges and Opportunities for Test and Reliability^*.

Alberto Bosio, Ian O'Connor, Marcello Traiola, Jorge Echavarria, Jürgen Teich, Muhammad Abdullah Hanif, Muhammad Shafique, Said Hamdioui, Bastien Deveautour, Patrick Girard, Arnaud Virazel, Koen Bertels

Proceedings of the 26th IEEE European Test Symposium, 2021

Approximate Logic Synthesis of Very Large Boolean Networks.

Jorge Echavarria, Stefan Wildermann, Jürgen Teich

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020

Probabilistic Error Propagation through Approximated Boolean Networks.

Jorge Echavarria, Stefan Wildermann, Oliver Keszöcze, Jürgen Teich

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2018

Efficient Arithmetic Error Rate Calculus for Visibility Reduced Approximate Adders.

Jorge Echavarria, Stefan Wildermann, Eduard Potwigin, Jürgen Teich

IEEE Embed. Syst. Lett., 2018

Can Approximate Computing Reduce Power Consumption on FPGAs?

Jorge Echavarria, Katja Schutz, Andreas Becher, Stefan Wildermann, Jürgen Teich

Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

Design space exploration of multi-output logic function approximations.

Jorge Echavarria, Stefan Wildermann, Jürgen Teich

Proceedings of the International Conference on Computer-Aided Design, 2018

AConFPGA: A Multiple-Output Boolean Function Approximation DSE Technique Targeting FPGAs.

Jorge Echavarria, Stefan Wildermann, Jürgen Teich

Proceedings of the International Conference on Field-Programmable Technology, 2018

2017

Self-Adaptive FPGA-Based Image Processing Filters Using Approximate Arithmetics.

Jutta Pirkl, Andreas Becher, Jorge Echavarria, Jürgen Teich, Stefan Wildermann

Proceedings of the 20th International Workshop on Software and Compilers for Embedded Systems, 2017

2016

FAU: Fast and error-optimized approximate adder units on LUT-Based FPGAs.

Jorge Echavarria, Stefan Wildermann, Andreas Becher, Jürgen Teich, Daniel Ziener

Proceedings of the 2016 International Conference on Field-Programmable Technology, 2016

A LUT-Based Approximate Adder.

Andreas Becher, Jorge Echavarria, Daniel Ziener, Stefan Wildermann, Jürgen Teich

Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016

2014

FSM merging and reduction for IP cores watermarking using Genetic Algorithms.

Jorge Echavarria, Alicia Morales-Reyes, René Cumplido, Miguel A. Salido

Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014