Kiarash Gharibdoust
According to our database1,
Kiarash Gharibdoust
authored at least 14 papers
between 2011 and 2020.
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Bibliography
2020
IEEE J. Solid State Circuits, 2020
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020
2019
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019
2017
A Time-Division Multiplexing Signaling Scheme for Inter-Symbol/Channel Interference Reduction in Low-Power Multi-Drop Memory Links.
IEEE Trans. Circuits Syst. II Express Briefs, 2017
Design and Modeling of Serial Data Transceiver Architecture by Employing Multi-Tone Single-Sideband Signaling Scheme.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
2016
A Digital Spectrum Shaping Signaling Serial-Data Transceiver With Crosstalk and ISI Reduction Property in Multidrop Interfaces.
IEEE Trans. Circuits Syst. II Express Briefs, 2016
Microelectron. J., 2016
A 4×9 Gb/s 1pJ/b Hybrid NRZ/Multi-Tone I/O With Crosstalk and ISI Reduction for Dense Interconnects.
IEEE J. Solid State Circuits, 2016
A wideband MDLL with jitter reduction scheme for forwarded clock serial links in 40 nm CMOS.
Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016
A fully-digital spectrum shaping signaling for serial-data transceiver with crosstalk and ISI reduction property in multi-drop memory interfaces.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
2015
IEEE J. Solid State Circuits, 2015
A 4×9 Gb/s 1 pJ/b NRZ/multi-tone serial-data transceiver with crosstalk reduction architecture for multi-drop memory interfaces in 40nm CMOS.
Proceedings of the Symposium on VLSI Circuits, 2015
10.3 A 7.5mW 7.5Gb/s mixed NRZ/multi-tone serial-data transceiver for multi-drop memory interfaces in 40nm CMOS.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
2011
IEEE Trans. Circuits Syst. II Express Briefs, 2011