Andrew Yi-Ann Huang

Affiliations:
  • NXP Semiconductors Taiwan Ltd, Kaohsiung, Taiwan


According to our database1, Andrew Yi-Ann Huang authored at least 10 papers between 2019 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
Wafer Defect Pattern Classification with Explainable-Decision Tree Technique.
Proceedings of the IEEE International Test Conference, 2022

2021
WGrid: Wafermap Grid Pattern Recognition with Machine Learning Techniques.
Proceedings of the IEEE International Test Conference, 2021

Semi-Supervised Framework for Wafer Defect Pattern Recognition with Enhanced Labeling.
Proceedings of the IEEE International Test Conference, 2021

Integrated Scratch Marker for Wafer Defect Diagnosis.
Proceedings of the IEEE International Test Conference in Asia, 2021

Automatic Inspection for Wafer Defect Pattern Recognition with Unsupervised Clustering.
Proceedings of the 26th IEEE European Test Symposium, 2021

2020
Innovative Practice on Wafer Test Innovations.
Proceedings of the 38th IEEE VLSI Test Symposium, 2020

TestDNA-E: Wafer Defect Signature for Pattern Recognition by Ensemble Learning.
Proceedings of the IEEE International Test Conference, 2020

PWS: Potential Wafermap Scratch Defect Pattern Recognition with Machine Learning Techniques.
Proceedings of the IEEE European Test Symposium, 2020

Wafer-Level Test Path Pattern Recognition and Test Characteristics for Test-Induced Defect Diagnosis.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019
TestDNA: Novel Wafer Defect Signature for Diagnosis and Yield Learning.
Proceedings of the IEEE International Test Conference, 2019


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